On Tue, Jan 26, 2021 at 8:42 PM Kenneth Feng <kenneth.feng@xxxxxxx> wrote: > > Background: > Gfx Duty Cycle Scaling(DCS) is applied on the small power limit skus. > When the current/power/temperature exceeds the limit with the heavy workload, > the gfx core can be shut off and powered on back and forth. > The ON time and OFF time is determined by the firmware according to > the accumulated power credits. > This feature is different from gfxoff.Gfxoff is applied in the idle case > and DCS is applied in the case with heavey workload.There are two types of DCS: > Async DCS and Frame-aligned DCS.Frame-aligned DCS is applied on 3D fullscreen > and VR workload. > Since we only supports Async DCS now,disalbe DCS when the 3D fullscreen or > the VR workload type is chosen. > > Verification: > The power is lowerer or the perf/watt is increased in the throttling case. > To be simplified, the entry/exit counter can be observed from the firmware. > > Signed-off-by: Kenneth Feng <kenneth.feng@xxxxxxx> > --- > .../gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c > index 24f3c96a5e5e..436d94cbb166 100644 > --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c > @@ -261,6 +261,9 @@ sienna_cichlid_get_allowed_feature_mask(struct smu_context *smu, > *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_GFX_GPO_BIT); > } > > + if (adev->asic_type == CHIP_NAVY_FLOUNDER || adev->asic_type == CHIP_DIMGREY_CAVEFISH) > + *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFX_DCS_BIT); > + > if (adev->pm.pp_feature & PP_MCLK_DPM_MASK) > *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_UCLK_BIT) > | FEATURE_MASK(FEATURE_MEM_VDDCI_SCALING_BIT) > @@ -1437,6 +1440,15 @@ static int sienna_cichlid_set_power_profile_mode(struct smu_context *smu, long * > smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetWorkloadMask, > 1 << workload_type, NULL); > > + /* have to disable dcs if it's the 3D fullscreen or VR workload type */ > + if (smu->adev->asic_type == CHIP_NAVY_FLOUNDER || > + smu->adev->asic_type == CHIP_DIMGREY_CAVEFISH) { > + ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_GFX_DCS_BIT, (workload_type == > + WORKLOAD_PPLIB_FULL_SCREEN_3D_BIT || workload_type == WORKLOAD_PPLIB_VR_BIT) ? 0 : 1); > + if (ret) > + return ret; > + } > + Since we don't support FA DCS yet, should we just drop this hunk for now? I think the workload profile stuff should be independent of FA DCS. Also so we want to add a ppfeaturemask flag to easily allow us to disable this at driver load time? Alex > return ret; > } > > -- > 2.17.1 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx