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[AMD Public Use]
As Evan said, this code is unused anyway and I have a patch in the works to drop all of this anyway. The manual manual rpm interface seems to not work on some boards at all. I guess the pwm interface is a better bet for manual fan control. See:
Alex
From: Lazar, Lijo <Lijo.Lazar@xxxxxxx>
Sent: Tuesday, January 26, 2021 11:37 PM
To: Deucher, Alexander <Alexander.Deucher@xxxxxxx>; Chen, Guchun <Guchun.Chen@xxxxxxx>; Quan, Evan <Evan.Quan@xxxxxxx>; Alex Deucher <alexdeucher@xxxxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx <amd-gfx@xxxxxxxxxxxxxxxxxxxxx>
Subject: RE: [PATCH] drm/amdgpu/pm/smu11: fix static fan speed readback
As far as I know, refclk is fixed at 25M for TACH; no need to consider ASIC refclk.
Thanks,
Lijo
From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx>
On Behalf Of Deucher, Alexander
Sent: Wednesday, January 27, 2021 10:05 AM
To: Chen, Guchun <Guchun.Chen@xxxxxxx>; Quan, Evan <Evan.Quan@xxxxxxx>; Alex Deucher <alexdeucher@xxxxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Subject: Re: [PATCH] drm/amdgpu/pm/smu11: fix static fan speed readback
[AMD Public Use]
[AMD Public Use]
Is the xclk really 25 Mhz or is there some divider for the fan stuff? Changing the xclk value will affect other places where this is used.
[AMD Public Use]
In soc15_get_xclk, we have independent handling for CHIP_RAVEN case.
If (adev->asic_type == CHIP_RAVEN)
return reference_clock / 4;
I am not sure if it's better to squash the patch into the asic specific function? Then we have one unified place to handle it.
Regards,
Guchun
-----Original Message-----
From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Quan, Evan
Sent: Wednesday, January 27, 2021 11:46 AM
To: Alex Deucher <alexdeucher@xxxxxxxxx>;
amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Deucher, Alexander <Alexander.Deucher@xxxxxxx>
Subject: RE: [PATCH] drm/amdgpu/pm/smu11: fix static fan speed readback
[AMD Official Use Only - Internal Distribution Only]
[AMD Official Use Only - Internal Distribution Only]
Actually after switching to retrieve fan speed from metrics table always, this API is not used any more.
Maybe we can just drop it. Either way the patch is reviewed-by: Evan Quan <evan.quan@xxxxxxx>
BR
Evan
-----Original Message-----
From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Alex Deucher
Sent: Wednesday, January 27, 2021 2:17 AM
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Deucher, Alexander <Alexander.Deucher@xxxxxxx>
Subject: [PATCH] drm/amdgpu/pm/smu11: fix static fan speed readback
The xclk needs to be divided by 4.
Fixes: acab02c1af43d3 ("drm/amdgpu/pm/smu11: Fix fan set speed bug")
Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
---
drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
index 147efe12973c..36dac106ed4b 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
@@ -1245,7 +1245,11 @@ int smu_v11_0_get_fan_speed_rpm(struct smu_context *smu, if (!tach_period) return -EINVAL;
-crystal_clock_freq = amdgpu_asic_get_xclk(adev);
+/*
+ * crystal_clock_freq div by 4 is required since the fan control
+ * module refers to 25MHz
+ */
+crystal_clock_freq = amdgpu_asic_get_xclk(adev) / 4;
tmp64 = (uint64_t)crystal_clock_freq * 60 * 10000; do_div(tmp64, (tach_period * 8));
--
2.29.2
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