[AMD Public Use]
Hi all,
This week I tested on an AMD Radeon RX 6800, and a HP Envy 360 with an AMD Ryzen 5 4500U APU. This week we are not recommending a promotion due to multiple visual impacts with MST.
Tested-by: Daniel Wheeler <daniel.wheeler@xxxxxxx>
Thank you,
Dan Wheeler
Technologist | AMD
SW Display
O +(1) 905-882-2600 ext. 74665
------------------------------------------------------------------------------------------------------------------
1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
Facebook | Twitter | amd.com
-----Original Message-----
From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Anson Jacob
Sent: January 22, 2021 3:07 PM
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Brol, Eryk <Eryk.Brol@xxxxxxx>; Li, Sun peng (Leo) <Sunpeng.Li@xxxxxxx>; Wentland, Harry <Harry.Wentland@xxxxxxx>; Zhuo, Qingqing <Qingqing.Zhuo@xxxxxxx>; Siqueira, Rodrigo <Rodrigo.Siqueira@xxxxxxx>; Jacob, Anson <Anson.Jacob@xxxxxxx>; Pillai, Aurabindo <Aurabindo.Pillai@xxxxxxx>; Lakha, Bhawanpreet <Bhawanpreet.Lakha@xxxxxxx>; R, Bindu <Bindu.R@xxxxxxx>
Subject: [PATCH 00/12] DC Patches Jan 22, 2021
This DC patchset brings improvements in multiple areas. In summary, we have:
* Fix display detection on HDMI ComboPHY
* FiX PWL backlight calculations
* Drop SOC bounding box hookup
* Fix DPCD values
* Reverted a change that caused memory leak after sleep(S3) state
on 4K HDMI displays
Anthony Koo (2):
drm/amd/display: [FW Promotion] Release 0.0.49
drm/amd/display: fix calculation for the pwl backlight curve
Aric Cyr (1):
drm/amd/display: 3.2.120
Bhawanpreet Lakha (1):
drm/amd/display: reuse current context instead of recreating one
Brendan Steve Leder (1):
drm/amd/display: initialize i2c speed if not initialized in
dcnxxx__resource.c
George Shen (1):
drm/amd/display: Fix DPCD translation for LTTPR AUX_RD_INTERVAL
Lewis Huang (1):
drm/amd/display: Set power gated default to true in seamless boot pipe
Michael Strauss (1):
drm/amd/display: Add null pointer check to is_dig_enabled func
Nicholas Kazlauskas (1):
drm/amd/display: Drop SOC bounding box hookup in DM/DC
Stylon Wang (1):
drm/amd/display: revert "drm/amd/display: Fix EDID parsing after
resume from suspend"
Sung Lee (1):
drm/amd/display: Add more Clock Sources to DCN2.1
Wenjing Liu (1):
drm/amd/display: correct some hdcp variable naming
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 30 ++---
.../amd/display/amdgpu_dm/amdgpu_dm_hdcp.c | 7 +-
.../display/dc/clk_mgr/dcn301/vg_clk_mgr.c | 3 +-
drivers/gpu/drm/amd/display/dc/core/dc.c | 32 +++--
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 14 +--
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 6 +-
drivers/gpu/drm/amd/display/dc/dc.h | 8 +-
drivers/gpu/drm/amd/display/dc/dc_stream.h | 3 +-
.../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 1 +
.../drm/amd/display/dc/dcn20/dcn20_resource.c | 111 ------------------ .../drm/amd/display/dc/dcn21/dcn21_resource.c | 10 ++ .../drm/amd/display/dc/dcn30/dcn30_resource.c | 107 +----------------
.../amd/display/dc/dcn301/dcn301_resource.c | 107 +----------------
drivers/gpu/drm/amd/display/dc/dm_cp_psp.h | 7 +-
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 5 +-
.../gpu/drm/amd/display/modules/hdcp/hdcp.h | 2 +-
.../drm/amd/display/modules/hdcp/hdcp_psp.c | 2 +-
.../drm/amd/display/modules/inc/mod_hdcp.h | 4 +-
.../amd/display/modules/power/power_helpers.c | 2 +-
19 files changed, 80 insertions(+), 381 deletions(-)
--
2.25.1
_______________________________________________
amd-gfx mailing list
amd-gfx@xxxxxxxxxxxxxxxxxxxxx
https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=04%7C01%7Cdaniel.wheeler%40amd.com%7Cb1754266d1e248b56d5808d8bf1149ea%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637469428281419527%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=0NfFlEvn54wU5sYNiWqVcczahkKKgb7ByVZOax%2Fs3Zk%3D&reserved=0
_______________________________________________
amd-gfx mailing list
amd-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
