[AMD Public Use]
Hi all,
I tested this patch on Navi10 and a Renoir laptop (HP Envy 360 with Ryzen 5 4500U).
Tested the laptop with its internal 1080p display and externally with USB-C to DP, USB-C to HDMI, USB- C to VGA, and USB-C to DVI to 2x 4k60 displays, 1x 1440p 144hz display, and one 1680x1050 display. Also tested using an MST hub with 1x 4k30 and 1x1440p 1444hz.
I did note a headless boot issue with Navi10 that I hadn't tested before, and some HDCP issues on Renoir that don't affect it's functionality.
Tested-by: Daniel Wheeler <daniel.wheeler@xxxxxxx>
Thank you,
Dan Wheeler
Technologist | AMD
SW Display
O +(1) 905-882-2600 ext. 74665
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-----Original Message-----
From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Anson Jacob
Sent: January 15, 2021 12:27 PM
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Brol, Eryk <Eryk.Brol@xxxxxxx>; Li, Sun peng (Leo) <Sunpeng.Li@xxxxxxx>; Wentland, Harry <Harry.Wentland@xxxxxxx>; Zhuo, Qingqing <Qingqing.Zhuo@xxxxxxx>; Siqueira, Rodrigo <Rodrigo.Siqueira@xxxxxxx>; Jacob, Anson <Anson.Jacob@xxxxxxx>; Pillai, Aurabindo <Aurabindo.Pillai@xxxxxxx>; Lakha, Bhawanpreet <Bhawanpreet.Lakha@xxxxxxx>; R, Bindu <Bindu.R@xxxxxxx>
Subject: [PATCH 00/16] DC Patches January 15, 2020
This DC patchset brings improvements in multiple areas.
Anthony Koo (1):
drm/amd/display: [FW Promotion] Release 0.0.48
Aric Cyr (2):
drm/amd/display: Allow PSTATE chnage when no displays are enabled
drm/amd/display: 3.2.119
Bing Guo (2):
drm/amd/display: Change function decide_dp_link_settings to avoid
infinite looping
drm/amd/display: Fix dml20v2_ModeSupportAndSystemConfigurationFull()
to check DesiredBPP.
George Shen (1):
drm/amd/display: Log link/connector info provided in BIOS object table
Jake Wang (1):
drm/amd/display: Update dram_clock_change_latency for DCN2.1
Mike Hsieh (1):
drm/amd/display: disable FEC while using eDP
Nicholas Kazlauskas (4):
drm/amd/display: Use hardware sequencer functions for PG control
drm/amd/display: Allow dmub srv hardware reset before HW init
drm/amd/display: Guard against NULL pointer deref when get_i2c_info
fails
drm/amd/display: Fix reset sequence with driver direct DMCUB fw load
Stylon Wang (1):
drm/amd/display: Report Freesync to vrr_range debugfs entry in DRM
Sung Lee (1):
drm/amd/display: DCN2X Find Secondary Pipe properly in MPO + ODM Case
Vladimir Stempen (1):
drm/amd/display: Fixed corruptions on HPDRX link loss restore
Wyatt Wood (1):
drm/amd/display: Allow dmu_stg to support cached inbox for dmub
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 +
.../display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c | 6 +-
drivers/gpu/drm/amd/display/dc/core/dc.c | 6 +
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 28 ++++-
.../gpu/drm/amd/display/dc/core/dc_link_ddc.c | 6 +
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 7 +-
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
.../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 18 ++-
.../drm/amd/display/dc/dcn20/dcn20_hwseq.c | 9 +-
.../drm/amd/display/dc/dcn20/dcn20_resource.c | 7 +-
.../drm/amd/display/dc/dcn21/dcn21_resource.c | 2 +-
.../dc/dml/dcn20/display_mode_vba_20v2.c | 117 ++++++++++++------
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 4 +-
.../gpu/drm/amd/display/dmub/src/dmub_dcn20.c | 11 +-
.../gpu/drm/amd/display/dmub/src/dmub_srv.c | 9 +-
15 files changed, 171 insertions(+), 65 deletions(-)
--
2.25.1
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