[AMD Public Use] Hi all, Ran the promotion test this week on Navi14 and a Renoir laptop (HP Envy 360 with Ryzen 5 4500U). Tested the laptop with it's internal 1080p display and externally with USB-C to DP and HDMI to 2x 4k60 displays and 1x 1440p 144hz display. Also tested using an MST hub with 2x 4k30. I found nothing causing any visual impact, and did notice that this promotion did fix some previous bugs that I had seen. Tested-by: Daniel Wheeler <daniel.wheeler@xxxxxxx> Thank you, Dan Wheeler Technologist | AMD SW Display -----Original Message----- From: Siqueira, Rodrigo <Rodrigo.Siqueira@xxxxxxx> Sent: Friday, January 8, 2021 5:12 PM To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx Cc: Wentland, Harry <Harry.Wentland@xxxxxxx>; Li, Sun peng (Leo) <Sunpeng.Li@xxxxxxx>; Lakha, Bhawanpreet <Bhawanpreet.Lakha@xxxxxxx>; Pillai, Aurabindo <Aurabindo.Pillai@xxxxxxx>; Zhuo, Qingqing <Qingqing.Zhuo@xxxxxxx>; Brol, Eryk <Eryk.Brol@xxxxxxx>; R, Bindu <Bindu.R@xxxxxxx>; Li, Roman <Roman.Li@xxxxxxx>; Wheeler, Daniel <Daniel.Wheeler@xxxxxxx> Subject: Re: [PATCH 00/21] DC Patches January 08, 2021 +Daniel On 01/08, Rodrigo Siqueira wrote: > Happy new year, this is the first code promotion of the year; for this > reason, most of the changes are related to fixes. > > This DC patchset brings improvements in multiple areas. In summary, we have: > * Multiple fixes and code refactoring. > * Updates on HUBP operations > > Best Regards > > Aric Cyr (2): > drm/amd/display: 3.2.117 > drm/amd/display: 3.2.118 > > Bhawanpreet Lakha (1): > drm/amd/display: enable HUBP blank behaviour > > Charlene Liu (1): > drm/amd/display: change SMU repsonse timeout to 2s > > Chiawen Huang (1): > drm/amd/display: removed unnecessary check when dpp clock increasing > > Jacky Liao (1): > drm/amd/display: Fix assert being hit with GAMCOR memory shut down > > Jun Lei (1): > drm/amd/display: implement T12 compliance > > Lewis Huang (1): > drm/amd/display: Separate fec debug flag and monitor patch > > Li, Roman (1): > drm/amd/display: disable dcn10 pipe split by default > > Mike Hsieh (1): > drm/amd/display: Remove unused P010 debug flag > > Nikola Cornij (1): > drm/amd/display: Add a missing DCN3.01 API mapping > > Qingqing Zhuo (1): > drm/amd/display: NULL pointer hang > > Raymond Yang (1): > drm/amd/display: fix seamless boot stream adding algorithm > > Stylon Wang (1): > drm/amd/display: Revert patch causing black screen > > Wesley Chalmers (6): > drm/amd/display: Initialize stack variable > drm/amd/display: HUBP_IN_BLANK for DCN30 > drm/amd/display: Remove HUBP_DISABLE from default > drm/amd/display: Unblank hubp based on plane visibility > drm/amd/display: New path for enabling DPG > drm/amd/display: New sequence for HUBP blank > > Yu-ting Shen (1): > drm/amd/display: doesn't reprogram AMD OUI > > .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1 - > .../gpu/drm/amd/display/dc/basics/dc_common.c | 20 ++++-- > .../gpu/drm/amd/display/dc/basics/dc_common.h | 4 +- > .../display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c | 3 +- > .../display/dc/clk_mgr/dcn301/dcn301_smu.c | 2 +- > drivers/gpu/drm/amd/display/dc/core/dc.c | 12 ++++ > drivers/gpu/drm/amd/display/dc/core/dc_link.c | 31 ++++++-- > .../gpu/drm/amd/display/dc/core/dc_link_dp.c | 49 +++++++++---- > .../gpu/drm/amd/display/dc/core/dc_resource.c | 28 +++++--- > drivers/gpu/drm/amd/display/dc/dc.h | 3 +- > drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 3 + > drivers/gpu/drm/amd/display/dc/dc_link.h | 8 +++ > drivers/gpu/drm/amd/display/dc/dc_stream.h | 11 +++ > .../display/dc/dce110/dce110_hw_sequencer.c | 31 ++++++++ > .../gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h | 2 +- > .../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 36 ++++++++-- > .../amd/display/dc/dcn10/dcn10_hw_sequencer.h | 5 ++ > .../gpu/drm/amd/display/dc/dcn10/dcn10_init.c | 1 + > .../gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c | 2 +- > .../gpu/drm/amd/display/dc/dcn10/dcn10_optc.c | 11 +++ > .../gpu/drm/amd/display/dc/dcn10/dcn10_optc.h | 1 + > .../drm/amd/display/dc/dcn10/dcn10_resource.c | 4 +- > .../gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h | 22 ++++-- > .../drm/amd/display/dc/dcn20/dcn20_hwseq.c | 12 +++- > .../gpu/drm/amd/display/dc/dcn20/dcn20_init.c | 1 + > .../gpu/drm/amd/display/dc/dcn21/dcn21_init.c | 1 + > .../drm/amd/display/dc/dcn30/dcn30_dpp_cm.c | 7 -- > .../gpu/drm/amd/display/dc/dcn30/dcn30_hubp.h | 1 + > .../drm/amd/display/dc/dcn30/dcn30_hwseq.c | 70 ++++++++++++++++++- > .../drm/amd/display/dc/dcn30/dcn30_hwseq.h | 4 ++ > .../gpu/drm/amd/display/dc/dcn30/dcn30_init.c | 2 + > .../gpu/drm/amd/display/dc/dcn30/dcn30_optc.c | 1 + > .../drm/amd/display/dc/dcn301/dcn301_init.c | 1 + > .../amd/display/dc/dcn301/dcn301_resource.c | 1 + > .../dc/dml/dcn30/display_mode_vba_30.c | 2 +- > .../gpu/drm/amd/display/dc/inc/core_types.h | 1 + > .../amd/display/dc/inc/hw/timing_generator.h | 1 + > .../gpu/drm/amd/display/dc/inc/hw_sequencer.h | 5 ++ > 38 files changed, 332 insertions(+), 68 deletions(-) > > -- > 2.25.1 > -- Rodrigo Siqueira https://siqueira.tech _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx
