On Fri, Jan 8, 2021 at 3:16 PM Lee Jones <lee.jones@xxxxxxxxxx> wrote: > > Fixes the following W=1 kernel build warning(s): > > drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_panel_cntl.c: In function ‘dce_get_16_bit_backlight_from_pwm’: > drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_panel_cntl.c:54:11: warning: variable ‘bl_pwm_cntl’ set but not used [-Wunused-but-set-variable] > drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_panel_cntl.c:53:11: warning: variable ‘pwm_period_cntl’ set but not used [-Wunused-but-set-variable] > > Cc: Harry Wentland <harry.wentland@xxxxxxx> > Cc: Leo Li <sunpeng.li@xxxxxxx> > Cc: Alex Deucher <alexander.deucher@xxxxxxx> > Cc: "Christian König" <christian.koenig@xxxxxxx> > Cc: David Airlie <airlied@xxxxxxxx> > Cc: Daniel Vetter <daniel@xxxxxxxx> > Cc: Anthony Koo <Anthony.Koo@xxxxxxx> > Cc: amd-gfx@xxxxxxxxxxxxxxxxxxxxx > Cc: dri-devel@xxxxxxxxxxxxxxxxxxxxx > Signed-off-by: Lee Jones <lee.jones@xxxxxxxxxx> Applied. Thanks! Alex > --- > drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.c b/drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.c > index 761fdfc1f5bd0..e923392358631 100644 > --- a/drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.c > +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.c > @@ -50,16 +50,16 @@ static unsigned int dce_get_16_bit_backlight_from_pwm(struct panel_cntl *panel_c > { > uint64_t current_backlight; > uint32_t round_result; > - uint32_t pwm_period_cntl, bl_period, bl_int_count; > - uint32_t bl_pwm_cntl, bl_pwm, fractional_duty_cycle_en; > + uint32_t bl_period, bl_int_count; > + uint32_t bl_pwm, fractional_duty_cycle_en; > uint32_t bl_period_mask, bl_pwm_mask; > struct dce_panel_cntl *dce_panel_cntl = TO_DCE_PANEL_CNTL(panel_cntl); > > - pwm_period_cntl = REG_READ(BL_PWM_PERIOD_CNTL); > + REG_READ(BL_PWM_PERIOD_CNTL); > REG_GET(BL_PWM_PERIOD_CNTL, BL_PWM_PERIOD, &bl_period); > REG_GET(BL_PWM_PERIOD_CNTL, BL_PWM_PERIOD_BITCNT, &bl_int_count); > > - bl_pwm_cntl = REG_READ(BL_PWM_CNTL); > + REG_READ(BL_PWM_CNTL); > REG_GET(BL_PWM_CNTL, BL_ACTIVE_INT_FRAC_CNT, (uint32_t *)(&bl_pwm)); > REG_GET(BL_PWM_CNTL, BL_PWM_FRACTIONAL_EN, &fractional_duty_cycle_en); > > -- > 2.25.1 > > _______________________________________________ > dri-devel mailing list > dri-devel@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/dri-devel _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx