RE: [PATCH] drm/amdgpu: set mode1 reset as default for dimgrey_cavefish

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[AMD Public Use]

 

Thanks for your reminder, I’ll add another patch to enable gpu recovery.

 

Tao

 

From: Deucher, Alexander <Alexander.Deucher@xxxxxxx>
Sent: Tuesday, December 15, 2020 10:27 PM
To: Chen, Jiansong (Simon) <Jiansong.Chen@xxxxxxx>; Zhou1, Tao <Tao.Zhou1@xxxxxxx>; Gui, Jack <Jack.Gui@xxxxxxx>; Zhang, Hawking <Hawking.Zhang@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Subject: Re: [PATCH] drm/amdgpu: set mode1 reset as default for dimgrey_cavefish

 

[AMD Official Use Only - Internal Distribution Only]

 

You will also need to add the asic_type to amdgpu_device_should_recover_gpu() if you the driver to actually use GPU reset when it encounters a hang.

 

Alex

 


From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> on behalf of Chen, Jiansong (Simon) <Jiansong.Chen@xxxxxxx>
Sent: Tuesday, December 15, 2020 5:33 AM
To: Zhou1, Tao <Tao.Zhou1@xxxxxxx>; Gui, Jack <Jack.Gui@xxxxxxx>; Zhang, Hawking <Hawking.Zhang@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx <amd-gfx@xxxxxxxxxxxxxxxxxxxxx>
Subject: RE: [PATCH] drm/amdgpu: set mode1 reset as default for dimgrey_cavefish

 

[AMD Official Use Only - Internal Distribution Only]

[AMD Official Use Only - Internal Distribution Only]

Reviewed-by: Jiansong Chen <Jiansong.Chen@xxxxxxx>

-----Original Message-----
From: Zhou1, Tao <Tao.Zhou1@xxxxxxx>
Sent: Tuesday, December 15, 2020 6:23 PM
To: Chen, Jiansong (Simon) <Jiansong.Chen@xxxxxxx>; Gui, Jack <Jack.Gui@xxxxxxx>; Zhang, Hawking <Hawking.Zhang@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Zhou1, Tao <Tao.Zhou1@xxxxxxx>
Subject: [PATCH] drm/amdgpu: set mode1 reset as default for dimgrey_cavefish

Use mode1 reset for dimgrey_cavefish by default.

Signed-off-by: Tao Zhou <tao.zhou1@xxxxxxx>
---
 drivers/gpu/drm/amd/amdgpu/nv.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c index ac02dd707c44..6bee3677394a 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -362,6 +362,7 @@ nv_asic_reset_method(struct amdgpu_device *adev)
 switch (adev->asic_type) {
 case CHIP_SIENNA_CICHLID:
 case CHIP_NAVY_FLOUNDER:
+case CHIP_DIMGREY_CAVEFISH:
 return AMD_RESET_METHOD_MODE1;
 default:
 if (smu_baco_is_support(smu))
--
2.17.1

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