[AMD Official Use Only - Internal Distribution Only]
[AMD Official Use Only - Internal Distribution Only]
Hi Evan/Alex,
In the process of baco enter/exit, smu disables all features, so smu_disable_dpms is not needed.
And the sequential steps in smu_smc_hw_setup after function smu_is_dpm_running are not needed since baco doesn't clean up the smu status.
This fix is specific to SIENNA_CICHLID. For the other ASICS, need to confirm since the firmware might be different.
Thanks.
Best Regards
Kenneth
-----Original Message-----
From: Quan, Evan <Evan.Quan@xxxxxxx>
Sent: Wednesday, November 18, 2020 8:46 AM
To: Feng, Kenneth <Kenneth.Feng@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Feng, Kenneth <Kenneth.Feng@xxxxxxx>
Subject: RE: [PATCH 2/2] drm/amd/pm: fix the crash after runtime pm resume
[AMD Official Use Only - Internal Distribution Only]
I suspect "smu_is_dpm_running" reports a wrong result due to "smu_system_features_control(smu, false)" was skipped for SIENNA_CICHLID in smu_disable_dpms().
That is outdated cached values were used for "smu_is_dpm_running".
If that's true, a fix in smu_disable_dpms() may be more proper.
Evan
-----Original Message-----
From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Kenneth Feng
Sent: Tuesday, November 17, 2020 9:31 PM
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Feng, Kenneth <Kenneth.Feng@xxxxxxx>
Subject: [PATCH 2/2] drm/amd/pm: fix the crash after runtime pm resume
Some features are still disabled after runtime pm resume. This can take the hardware back.
Unlike other projects, this doesn't need pptable retransfer.
Signed-off-by: Kenneth Feng <kenneth.feng@xxxxxxx>
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index 39990790ed67..ebd50f144c5d 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -914,11 +914,14 @@ static int smu_smc_hw_setup(struct smu_context *smu) { struct amdgpu_device *adev = smu->adev; uint32_t pcie_gen = 0, pcie_width = 0; -int ret;
+int ret = 0;
if (adev->in_suspend && smu_is_dpm_running(smu)) { dev_info(adev->dev, "dpm has been enabled\n"); -return 0;
+/* this is needed specifically */
+if (adev->asic_type == CHIP_SIENNA_CICHLID) ret =
+smu_system_features_control(smu, true); return ret;
}
ret = smu_init_display_count(smu, 0);
--
2.17.1
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