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[AMD Official Use Only - Internal Distribution Only]
Series is:
Reviewed-by: Alex Deucher <alexander.deucher@xxxxxxx>
Does the same thing need to be applied to navy flounder and dimgrey cavefish?
Alex
From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> on behalf of Kenneth Feng <kenneth.feng@xxxxxxx>
Sent: Tuesday, November 17, 2020 8:30 AM To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx <amd-gfx@xxxxxxxxxxxxxxxxxxxxx> Cc: Feng, Kenneth <Kenneth.Feng@xxxxxxx> Subject: [PATCH 2/2] drm/amd/pm: fix the crash after runtime pm resume Some features are still disabled after runtime pm resume. This can take the hardware back.
Unlike other projects, this doesn't need pptable retransfer. Signed-off-by: Kenneth Feng <kenneth.feng@xxxxxxx> --- drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c index 39990790ed67..ebd50f144c5d 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c @@ -914,11 +914,14 @@ static int smu_smc_hw_setup(struct smu_context *smu) { struct amdgpu_device *adev = smu->adev; uint32_t pcie_gen = 0, pcie_width = 0; - int ret; + int ret = 0; if (adev->in_suspend && smu_is_dpm_running(smu)) { dev_info(adev->dev, "dpm has been enabled\n"); - return 0; + /* this is needed specifically */ + if (adev->asic_type == CHIP_SIENNA_CICHLID) + ret = smu_system_features_control(smu, true); + return ret; } ret = smu_init_display_count(smu, 0); -- 2.17.1 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://nam11.safelinks.protection.outlook.com/?url=""> |
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