[AMD Public Use] Reviewed-by: Guchun Chen <guchun.chen@xxxxxxx> Regards, Guchun -----Original Message----- From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Hawking Zhang Sent: Friday, November 13, 2020 5:28 PM To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx Cc: Zhang, Hawking <Hawking.Zhang@xxxxxxx> Subject: [PATCH] drm/amdgpu: declare smuio callback function as static fix -Wmissing-protoypes warning Signed-off-by: Hawking Zhang <Hawking.Zhang@xxxxxxx> --- drivers/gpu/drm/amd/amdgpu/smuio_v11_0.c | 4 ++-- drivers/gpu/drm/amd/amdgpu/smuio_v9_0.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/smuio_v11_0.c b/drivers/gpu/drm/amd/amdgpu/smuio_v11_0.c index 137b410..e9c474c 100644 --- a/drivers/gpu/drm/amd/amdgpu/smuio_v11_0.c +++ b/drivers/gpu/drm/amd/amdgpu/smuio_v11_0.c @@ -35,7 +35,7 @@ static u32 smuio_v11_0_get_rom_data_offset(struct amdgpu_device *adev) return SOC15_REG_OFFSET(SMUIO, 0, mmROM_DATA); } -void smuio_v11_0_update_rom_clock_gating(struct amdgpu_device *adev, bool enable) +static void smuio_v11_0_update_rom_clock_gating(struct amdgpu_device +*adev, bool enable) { u32 def, data; @@ -56,7 +56,7 @@ void smuio_v11_0_update_rom_clock_gating(struct amdgpu_device *adev, bool enable WREG32_SOC15(SMUIO, 0, mmCGTT_ROM_CLK_CTRL0, data); } -void smuio_v11_0_get_clock_gating_state(struct amdgpu_device *adev, u32 *flags) +static void smuio_v11_0_get_clock_gating_state(struct amdgpu_device +*adev, u32 *flags) { u32 data; diff --git a/drivers/gpu/drm/amd/amdgpu/smuio_v9_0.c b/drivers/gpu/drm/amd/amdgpu/smuio_v9_0.c index c9c3e30..8417890 100644 --- a/drivers/gpu/drm/amd/amdgpu/smuio_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/smuio_v9_0.c @@ -35,7 +35,7 @@ static u32 smuio_v9_0_get_rom_data_offset(struct amdgpu_device *adev) return SOC15_REG_OFFSET(SMUIO, 0, mmROM_DATA); } -void smuio_v9_0_update_rom_clock_gating(struct amdgpu_device *adev, bool enable) +static void smuio_v9_0_update_rom_clock_gating(struct amdgpu_device +*adev, bool enable) { u32 def, data; @@ -56,7 +56,7 @@ void smuio_v9_0_update_rom_clock_gating(struct amdgpu_device *adev, bool enable) WREG32_SOC15(SMUIO, 0, mmCGTT_ROM_CLK_CTRL0, data); } -void smuio_v9_0_get_clock_gating_state(struct amdgpu_device *adev, u32 *flags) +static void smuio_v9_0_get_clock_gating_state(struct amdgpu_device +*adev, u32 *flags) { u32 data; -- 2.7.4 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=04%7C01%7Cguchun.chen%40amd.com%7C40070a1eccff4a9b33f208d887b67228%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637408564958028535%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=LxBVX8XQAcGAq3eccCxbPCNlLojc1fPiKIp9HwI7EPA%3D&reserved=0 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx