[AMD Official Use Only - Internal Distribution Only]
> -----Original Message-----
> From: Alex Deucher <alexdeucher@xxxxxxxxx>
> Sent: Friday, November 13, 2020 3:51 AM
> To: Liang, Prike <Prike.Liang@xxxxxxx>
> Cc: amd-gfx list <amd-gfx@xxxxxxxxxxxxxxxxxxxxx>; Deucher, Alexander
> <Alexander.Deucher@xxxxxxx>; Huang, Ray <Ray.Huang@xxxxxxx>
> Subject: Re: [PATCH 4/5] drm/amdgpu: fix reset support for s0i3 enablement
>
> On Thu, Nov 12, 2020 at 2:06 AM Prike Liang <Prike.Liang@xxxxxxx> wrote:
> >
> > update amdgpu device suspend sequence for gpu reset during s0i3 enable.
> >
> > Signed-off-by: Prike Liang <Prike.Liang@xxxxxxx>
>
> Maybe squash this one into patch 3?
>
> Alex
>
[Prike] Yes, this patch only handle the GPU reset base on the s0i3 enablement and will merge to patch3.
>
> > ---
> > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> > b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> > index cf6a1b9..2f60b70 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> > @@ -2650,7 +2650,7 @@ static int
> > amdgpu_device_ip_suspend_phase1(struct amdgpu_device *adev) {
> > int i, r;
> >
> > - if (!amdgpu_acpi_is_s0ix_supported()) {
> > + if (!amdgpu_acpi_is_s0ix_supported() || amdgpu_in_reset(adev))
> > + {
> > amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE);
> > amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE);
> > }
> > @@ -3708,7 +3708,7 @@ int amdgpu_device_suspend(struct drm_device
> > *dev, bool fbcon)
> >
> > amdgpu_fence_driver_suspend(adev);
> >
> > - if (!amdgpu_acpi_is_s0ix_supported())
> > + if (!amdgpu_acpi_is_s0ix_supported() || amdgpu_in_reset(adev))
> > r = amdgpu_device_ip_suspend_phase2(adev);
> > else
> > amdgpu_gfx_state_change_set(adev,
> > sGpuChangeState_D3Entry);
> > --
> > 2.7.4
> >
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