On Thu, Nov 12, 2020 at 10:23 AM James Zhu <jamesz@xxxxxxx> wrote:
>
>
> On 2020-11-12 9:23 a.m., Alex Deucher wrote:
> > On Wed, Nov 11, 2020 at 5:28 PM James Zhu <James.Zhu@xxxxxxx> wrote:
> >> This allows us to enable dec software ring feature on VCN.
> >> The default is 0 for all asics, and it is only valid for
> >> asics with vcn3.0 and above.
> >>
> >> Signed-off-by: James Zhu <James.Zhu@xxxxxxx>
> >> Reviewed-by: Leo Liu <leo.liu@xxxxxxx>
> >> ---
> >> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
> >> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 8 ++++++++
> >> 2 files changed, 9 insertions(+)
> >>
> >> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> >> index 20400ec..cc47da6 100644
> >> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> >> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> >> @@ -209,6 +209,7 @@ extern int amdgpu_si_support;
> >> extern int amdgpu_cik_support;
> >> #endif
> >> extern int amdgpu_num_kcq;
> >> +extern int amdgpu_dec_sw_ring_enabled;
> >>
> >> #define AMDGPU_VM_MAX_NUM_CTX 4096
> >> #define AMDGPU_SG_THRESHOLD (256*1024*1024)
> >> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> >> index 999f84d..570088f 100644
> >> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> >> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> >> @@ -160,6 +160,7 @@ int amdgpu_force_asic_type = -1;
> >> int amdgpu_tmz;
> >> int amdgpu_reset_method = -1; /* auto */
> >> int amdgpu_num_kcq = -1;
> >> +int amdgpu_dec_sw_ring_enabled;
> >>
> >> struct amdgpu_mgpu_info mgpu_info = {
> >> .mutex = __MUTEX_INITIALIZER(mgpu_info.mutex),
> >> @@ -806,6 +807,13 @@ module_param_named(bad_page_threshold, amdgpu_bad_page_threshold, int, 0444);
> >> MODULE_PARM_DESC(num_kcq, "number of kernel compute queue user want to setup (8 if set to greater than 8 or less than 0, only affect gfx 8+)");
> >> module_param_named(num_kcq, amdgpu_num_kcq, int, 0444);
> >>
> >> +/**
> >> + * DOC: dec_sw_ring_enabled (uint)
> >> + * Override vcn decode software ring features enabled.
> >> + */
> >> +MODULE_PARM_DESC(dec_sw_ring_enabled, "vcn dec sw ring support (1 = enable, 0 = disable (default))");
> >> +module_param_named(dec_sw_ring_enabled, amdgpu_dec_sw_ring_enabled, int, 0444);
> > How about just vcn_sw_ring as the parameter name?
> [JZ] It is for decode ring only. if just use vcn_sw_ring. I am not sure
> if it will confuse people.
Are we intending to have a separate enable option for enc? If so, is
there value in that vs just having one knob for both?
Alex
> >
> >> +
> >> static const struct pci_device_id pciidlist[] = {
> >> #ifdef CONFIG_DRM_AMDGPU_SI
> >> {0x1002, 0x6780, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
> >> --
> >> 2.7.4
> >>
> >> _______________________________________________
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> >> amd-gfx@xxxxxxxxxxxxxxxxxxxxx
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