[AMD Official Use Only - Internal Distribution Only] Yes, it is intended for that. BR Evan -----Original Message----- From: Koenig, Christian <Christian.Koenig@xxxxxxx> Sent: Friday, October 30, 2020 7:06 PM To: Quan, Evan <Evan.Quan@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx Cc: Deucher, Alexander <Alexander.Deucher@xxxxxxx> Subject: Re: [PATCH] drm/amdgpu: apply dm_pp_notify_wm_clock_changes() for Polaris only Am 30.10.20 um 12:04 schrieb Evan Quan: > Will expand it to other ASICs after verified. > > Change-Id: I03e074ea0e921a984eb819b222e434e88888e375 > Signed-off-by: Evan Quan <evan.quan@xxxxxxx> Acked-by: Christian König <christian.koenig@xxxxxxx> I assume this fixes my issue on Vega20? Thanks, Christian. > --- > drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c > index fd39dd67bfa4..84065c12d4b8 100644 > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c > @@ -462,7 +462,12 @@ bool dm_pp_notify_wm_clock_changes( > void *pp_handle = adev->powerplay.pp_handle; > const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; > > -if (pp_funcs && pp_funcs->set_watermarks_for_clocks_ranges) { > +/* > + * Limit this watermark setting for Polaris for now > + * TODO: expand this to other ASICs > + */ > +if ((adev->asic_type >= CHIP_POLARIS10) && (adev->asic_type <= CHIP_VEGAM) > + && pp_funcs && pp_funcs->set_watermarks_for_clocks_ranges) { > if (!pp_funcs->set_watermarks_for_clocks_ranges(pp_handle, > (void *)wm_with_clock_ranges)) > return true; _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx