Re: [PATCH 1/4] drm/amdgpu/display: remove DRM_AMD_DC_GREEN_SARDINE

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On 2020-10-27 11:19, Alex Deucher wrote:
> On Mon, Oct 26, 2020 at 7:06 PM Luben Tuikov <luben.tuikov@xxxxxxx> wrote:
>>
>> Consolidating DCN seems like a good idea.
>>
>> Reviewed-by: Luben Tuikov <luben.tuikov@xxxxxxx>
> 
> Is this for the whole series or just this patch?

Sorry, whose series!

Regards,
Luben

> 
> Thanks!
> 
> Alex
> 
>>
>> Regards,
>> Luben
>>
>> On 2020-10-26 12:35 p.m., Alex Deucher wrote:
>>> Ping again?
>>>
>>> On Thu, Oct 22, 2020 at 1:31 AM Alex Deucher <alexdeucher@xxxxxxxxx> wrote:
>>>>
>>>> Ping on this series?
>>>>
>>>> Alex
>>>>
>>>> On Fri, Oct 16, 2020 at 12:50 PM Alex Deucher <alexdeucher@xxxxxxxxx> wrote:
>>>>>
>>>>> No need for a separate config option at this point.
>>>>>
>>>>> Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
>>>>> ---
>>>>>  drivers/gpu/drm/amd/display/Kconfig               | 8 --------
>>>>>  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 6 ------
>>>>>  drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c  | 2 --
>>>>>  drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 2 --
>>>>>  drivers/gpu/drm/amd/display/include/dal_asic_id.h | 2 --
>>>>>  5 files changed, 20 deletions(-)
>>>>>
>>>>> diff --git a/drivers/gpu/drm/amd/display/Kconfig b/drivers/gpu/drm/amd/display/Kconfig
>>>>> index 93cdcd1ee9ff..cf87133f88e6 100644
>>>>> --- a/drivers/gpu/drm/amd/display/Kconfig
>>>>> +++ b/drivers/gpu/drm/amd/display/Kconfig
>>>>> @@ -17,14 +17,6 @@ config DRM_AMD_DC_DCN
>>>>>         help
>>>>>           Raven, Navi and Renoir family support for display engine
>>>>>
>>>>> -config DRM_AMD_DC_GREEN_SARDINE
>>>>> -       bool "Green Sardine support"
>>>>> -       default y
>>>>> -       depends on DRM_AMD_DC_DCN
>>>>> -        help
>>>>> -            Choose this option if you want to have
>>>>> -            Green Sardine support for display engine
>>>>> -
>>>>>  config DRM_AMD_DC_DCN3_0
>>>>>          bool "DCN 3.0 family"
>>>>>          depends on DRM_AMD_DC && X86
>>>>> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>>>>> index 8a90063ac08a..2aa810d3554b 100644
>>>>> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>>>>> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>>>>> @@ -100,10 +100,8 @@ MODULE_FIRMWARE(FIRMWARE_SIENNA_CICHLID_DMUB);
>>>>>  #define FIRMWARE_NAVY_FLOUNDER_DMUB "amdgpu/navy_flounder_dmcub.bin"
>>>>>  MODULE_FIRMWARE(FIRMWARE_NAVY_FLOUNDER_DMUB);
>>>>>  #endif
>>>>> -#if defined(CONFIG_DRM_AMD_DC_GREEN_SARDINE)
>>>>>  #define FIRMWARE_GREEN_SARDINE_DMUB "amdgpu/green_sardine_dmcub.bin"
>>>>>  MODULE_FIRMWARE(FIRMWARE_GREEN_SARDINE_DMUB);
>>>>> -#endif
>>>>>  #if defined(CONFIG_DRM_AMD_DC_DCN3_01)
>>>>>  #define FIRMWARE_VANGOGH_DMUB "amdgpu/vangogh_dmcub.bin"
>>>>>  MODULE_FIRMWARE(FIRMWARE_VANGOGH_DMUB);
>>>>> @@ -985,10 +983,8 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
>>>>>         case CHIP_RAVEN:
>>>>>         case CHIP_RENOIR:
>>>>>                 init_data.flags.gpu_vm_support = true;
>>>>> -#if defined(CONFIG_DRM_AMD_DC_GREEN_SARDINE)
>>>>>                 if (ASICREV_IS_GREEN_SARDINE(adev->external_rev_id))
>>>>>                         init_data.flags.disable_dmcu = true;
>>>>> -#endif
>>>>>                 break;
>>>>>         default:
>>>>>                 break;
>>>>> @@ -1289,10 +1285,8 @@ static int dm_dmub_sw_init(struct amdgpu_device *adev)
>>>>>         case CHIP_RENOIR:
>>>>>                 dmub_asic = DMUB_ASIC_DCN21;
>>>>>                 fw_name_dmub = FIRMWARE_RENOIR_DMUB;
>>>>> -#if defined(CONFIG_DRM_AMD_DC_GREEN_SARDINE)
>>>>>                 if (ASICREV_IS_GREEN_SARDINE(adev->external_rev_id))
>>>>>                         fw_name_dmub = FIRMWARE_GREEN_SARDINE_DMUB;
>>>>> -#endif
>>>>>                 break;
>>>>>  #if defined(CONFIG_DRM_AMD_DC_DCN3_0)
>>>>>         case CHIP_SIENNA_CICHLID:
>>>>> diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
>>>>> index b361dc6c3489..19d97ed6beb8 100644
>>>>> --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
>>>>> +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
>>>>> @@ -170,12 +170,10 @@ struct clk_mgr *dc_clk_mgr_create(struct dc_context *ctx, struct pp_smu_funcs *p
>>>>>                         break;
>>>>>                 }
>>>>>
>>>>> -#if defined(CONFIG_DRM_AMD_DC_GREEN_SARDINE)
>>>>>                 if (ASICREV_IS_GREEN_SARDINE(asic_id.hw_internal_rev)) {
>>>>>                         rn_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg);
>>>>>                         break;
>>>>>                 }
>>>>> -#endif
>>>>>                 if (ASICREV_IS_RAVEN2(asic_id.hw_internal_rev)) {
>>>>>                         rv2_clk_mgr_construct(ctx, clk_mgr, pp_smu);
>>>>>                         break;
>>>>> diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
>>>>> index ab105f26b511..419c0df08602 100644
>>>>> --- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
>>>>> +++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
>>>>> @@ -126,10 +126,8 @@ enum dce_version resource_parse_asic_id(struct hw_asic_id asic_id)
>>>>>                         dc_version = DCN_VERSION_1_01;
>>>>>                 if (ASICREV_IS_RENOIR(asic_id.hw_internal_rev))
>>>>>                         dc_version = DCN_VERSION_2_1;
>>>>> -#if defined(CONFIG_DRM_AMD_DC_GREEN_SARDINE)
>>>>>                 if (ASICREV_IS_GREEN_SARDINE(asic_id.hw_internal_rev))
>>>>>                         dc_version = DCN_VERSION_2_1;
>>>>> -#endif
>>>>>                 break;
>>>>>  #endif
>>>>>
>>>>> diff --git a/drivers/gpu/drm/amd/display/include/dal_asic_id.h b/drivers/gpu/drm/amd/display/include/dal_asic_id.h
>>>>> index b4c3838322af..2bf60ac2974f 100644
>>>>> --- a/drivers/gpu/drm/amd/display/include/dal_asic_id.h
>>>>> +++ b/drivers/gpu/drm/amd/display/include/dal_asic_id.h
>>>>> @@ -209,12 +209,10 @@ enum {
>>>>>  #if defined(CONFIG_DRM_AMD_DC_DCN3_02)
>>>>>  #define ASICREV_IS_DIMGREY_CAVEFISH_P(eChipRev)        ((eChipRev >= NV_DIMGREY_CAVEFISH_P_A0) && (eChipRev < NV_UNKNOWN))
>>>>>  #endif
>>>>> -#if defined(CONFIG_DRM_AMD_DC_GREEN_SARDINE)
>>>>>  #define GREEN_SARDINE_A0 0xA1
>>>>>  #ifndef ASICREV_IS_GREEN_SARDINE
>>>>>  #define ASICREV_IS_GREEN_SARDINE(eChipRev) ((eChipRev >= GREEN_SARDINE_A0) && (eChipRev < 0xFF))
>>>>>  #endif
>>>>> -#endif
>>>>>  #if defined(CONFIG_DRM_AMD_DC_DCN3_01)
>>>>>  #define FAMILY_VGH 144
>>>>>  #define DEVICE_ID_VGH_163F 0x163F
>>>>> --
>>>>> 2.25.4
>>>>>
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