On Thu, Oct 1, 2020 at 9:35 AM Zhang, Hawking <Hawking.Zhang@xxxxxxx> wrote: > > [AMD Public Use] > > @@ -2388,6 +2388,7 @@ static const struct pptable_funcs arcturus_ppt_funcs = { > .gfx_ulv_control = smu_v11_0_gfx_ulv_control, > .deep_sleep_control = smu_v11_0_deep_sleep_control, > .get_fan_parameters = arcturus_get_fan_parameters, > + .interrupt_work = smu_v11_0_interrupt_work, > }; > > I doubt Arcturus MP1 really supports ACDC switch and probably even doesn't have smc message to ack the interrupt as well. If so, the interrupt_work function shall not be necessary for Arcturus. Other than that > Yeah, I doubt vangogh does either. I was just trying to keep the behavior consistent with the current code. I would guess we would never get a ctxid of 3 or 4 on those chips in the first place so the work would never be scheduled. Alex > Series is > Reviewed-by: Hawking Zhang <Hawking.Zhang@xxxxxxx> > > Regards, > Hawking > -----Original Message----- > From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Alex Deucher > Sent: Thursday, October 1, 2020 21:17 > To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx > Cc: Deucher, Alexander <Alexander.Deucher@xxxxxxx> > Subject: [PATCH 2/2] drm/amdgpu/swsmu: add interrupt work handler for smu11 parts > > We need to schedule the smu AC/DC interrupt ack to avoid potentially sleeping if the smu message mutex is contended. > > Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx> > --- > drivers/gpu/drm/amd/pm/inc/smu_v11_0.h | 2 ++ > drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c | 1 + > drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 1 + > .../gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 1 + > drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 10 ++++++++-- > drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 1 + > 6 files changed, 14 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h b/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h > index f57dc586649a..8885bde3ea3d 100644 > --- a/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h > +++ b/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h > @@ -281,5 +281,7 @@ int smu_v11_0_gfx_ulv_control(struct smu_context *smu, int smu_v11_0_deep_sleep_control(struct smu_context *smu, > bool enablement); > > +void smu_v11_0_interrupt_work(struct smu_context *smu); > + > #endif > #endif > diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c > index d298fa65274d..fc376281e629 100644 > --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c > @@ -2388,6 +2388,7 @@ static const struct pptable_funcs arcturus_ppt_funcs = { > .gfx_ulv_control = smu_v11_0_gfx_ulv_control, > .deep_sleep_control = smu_v11_0_deep_sleep_control, > .get_fan_parameters = arcturus_get_fan_parameters, > + .interrupt_work = smu_v11_0_interrupt_work, > }; > > void arcturus_set_ppt_funcs(struct smu_context *smu) diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c > index be44cb941e73..3f1377f28493 100644 > --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c > @@ -2755,6 +2755,7 @@ static const struct pptable_funcs navi10_ppt_funcs = { > .deep_sleep_control = smu_v11_0_deep_sleep_control, > .get_fan_parameters = navi10_get_fan_parameters, > .post_init = navi10_post_smu_init, > + .interrupt_work = smu_v11_0_interrupt_work, > }; > > void navi10_set_ppt_funcs(struct smu_context *smu) diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c > index a2cb831ce8aa..3c8732f34b1f 100644 > --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c > @@ -2784,6 +2784,7 @@ static const struct pptable_funcs sienna_cichlid_ppt_funcs = { > .gfx_ulv_control = smu_v11_0_gfx_ulv_control, > .deep_sleep_control = smu_v11_0_deep_sleep_control, > .get_fan_parameters = sienna_cichlid_get_fan_parameters, > + .interrupt_work = smu_v11_0_interrupt_work, > }; > > void sienna_cichlid_set_ppt_funcs(struct smu_context *smu) diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c > index effa4391b577..3e949e53cdc3 100644 > --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c > @@ -958,6 +958,12 @@ static int smu_v11_0_process_pending_interrupt(struct smu_context *smu) > return ret; > } > > +void smu_v11_0_interrupt_work(struct smu_context *smu) { > + if (smu_v11_0_ack_ac_dc_interrupt(smu)) > + dev_err(smu->adev->dev, "Ack AC/DC interrupt Failed!\n"); } > + > int smu_v11_0_enable_thermal_alert(struct smu_context *smu) { > int ret = 0; > @@ -1323,11 +1329,11 @@ static int smu_v11_0_irq_process(struct amdgpu_device *adev, > switch (ctxid) { > case 0x3: > dev_dbg(adev->dev, "Switched to AC mode!\n"); > - smu_v11_0_ack_ac_dc_interrupt(&adev->smu); > + schedule_work(&smu->interrupt_work); > break; > case 0x4: > dev_dbg(adev->dev, "Switched to DC mode!\n"); > - smu_v11_0_ack_ac_dc_interrupt(&adev->smu); > + schedule_work(&smu->interrupt_work); > break; > case 0x7: > /* > diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c > index d6759de40503..145712a24b80 100644 > --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c > @@ -341,6 +341,7 @@ static const struct pptable_funcs vangogh_ppt_funcs = { > .get_pp_feature_mask = smu_cmn_get_pp_feature_mask, > .set_pp_feature_mask = smu_cmn_set_pp_feature_mask, > .disable_all_features_with_exception = smu_cmn_disable_all_features_with_exception, > + .interrupt_work = smu_v11_0_interrupt_work, > }; > > void vangogh_set_ppt_funcs(struct smu_context *smu) > -- > 2.25.4 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@xxxxxxxxxxxxxxxxxxxxx > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=02%7C01%7Chawking.zhang%40amd.com%7C83deb1c80e614081cb9a08d8660c56ad%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637371550481303648&sdata=58V1WjAucW4EGNh9PKOoZ%2BqC5bapiWOGR83pnAxLIxk%3D&reserved=0 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx