[AMD Official Use Only - Internal Distribution Only] Reviewed-by: Prike Liang <Prike.Liang@xxxxxxx> Thanks, Prike > -----Original Message----- > From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Alex > Deucher > Sent: Tuesday, September 29, 2020 2:19 AM > To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx > Cc: Deucher, Alexander <Alexander.Deucher@xxxxxxx> > Subject: [PATCH] drm/amdgpu/swsmu/smu12: fix force clock handling for > mclk > > The state array is in the reverse order compared to other asics (high to low > rather than low to high). > > Bug: > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitla > b.freedesktop.org%2Fdrm%2Famd%2F- > %2Fissues%2F1313&data=02%7C01%7CPrike.Liang%40amd.com%7C15f > 59da6951546dbea4808d863dafba6%7C3dd8961fe4884e608e11a82d994e183 > d%7C0%7C0%7C637369139485609967&sdata=8QG%2FcFh8K3t7BT%2Ft > cZJt6KqYOYxQVX9dblyzebY4rFc%3D&reserved=0 > Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx> > --- > drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c | 8 +++++--- > 1 file changed, 5 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c > b/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c > index 55a254be5ac2..66c1026489be 100644 > --- a/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c > @@ -222,14 +222,16 @@ static int renoir_get_profiling_clk_mask(struct > smu_context *smu, > *sclk_mask = 0; > } else if (level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK) { > if (mclk_mask) > -*mclk_mask = 0; > +/* mclk levels are in reverse order */ > +*mclk_mask = NUM_MEMCLK_DPM_LEVELS - 1; > } else if (level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { > if(sclk_mask) > /* The sclk as gfxclk and has three level about > max/min/current */ > *sclk_mask = 3 - 1; > > if(mclk_mask) > -*mclk_mask = NUM_MEMCLK_DPM_LEVELS - 1; > +/* mclk levels are in reverse order */ > +*mclk_mask = 0; > > if(soc_mask) > *soc_mask = NUM_SOCCLK_DPM_LEVELS - 1; @@ - > 323,7 +325,7 @@ static int renoir_get_dpm_ultimate_freq(struct > smu_context *smu, > case SMU_UCLK: > case SMU_FCLK: > case SMU_MCLK: > -ret = renoir_get_dpm_clk_limited(smu, clk_type, 0, > min); > +ret = renoir_get_dpm_clk_limited(smu, clk_type, > +NUM_MEMCLK_DPM_LEVELS - 1, min); > if (ret) > goto failed; > break; > -- > 2.25.4 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@xxxxxxxxxxxxxxxxxxxxx > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.f > reedesktop.org%2Fmailman%2Flistinfo%2Famd- > gfx&data=02%7C01%7CPrike.Liang%40amd.com%7C15f59da6951546db > ea4808d863dafba6%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C > 637369139485609967&sdata=kH8rL1yy2JAGfJcsVdKfIP5wVjWMW%2Bp > NLOLSuZssGh0%3D&reserved=0 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx
