[AMD Official Use Only - Internal Distribution Only]
Looks you missed many places, e.g.:
866 if (amdgpu_mcbp || amdgpu_sriov_vf(adev)) {
867 bo_va = fpriv->csa_va;
868 BUG_ON(!bo_va);
869 r = amdgpu_vm_bo_update(adev, bo_va, false);
870 if (r)
871 return r;
872
873 r = amdgpu_sync_vm_fence(&p->job->sync, bo_va->last_pt_update);
874 if (r)
875 return r;
876 }
949 if (chunk_ib->ip_type == AMDGPU_HW_IP_GFX &&
950 (amdgpu_mcbp || amdgpu_sriov_vf(adev))) {
951 if (chunk_ib->flags & AMDGPU_IB_FLAG_PREEMPT) {
952 if (chunk_ib->flags & AMDGPU_IB_FLAG_CE)
953 ce_preempt++;
954 else
955 de_preempt++;
956 }
957
958 /* each GFX command submit allows 0 or 1 IB preemptible for CE & DE */
959 if (ce_preempt > 1 || de_preempt > 1)
960 return -EINVAL;
961 }
2029 r = amdgpu_device_wb_init(adev);
2030 if (r) {
2031 DRM_ERROR("amdgpu_device_wb_init failed %d\n", r);
2032 goto init_failed;
2033 }
2034 adev->ip_blocks[i].status.hw = true;
2035
2036 /* right after GMC hw init, we create CSA */
2037 if (amdgpu_mcbp || amdgpu_sriov_vf(adev)) {
2038 r = amdgpu_allocate_static_csa(adev, &adev->virt.csa_obj,
2039 AMDGPU_GEM_DOMAIN_VRAM,
2040 AMDGPU_CSA_SIZE);
2041 if (r) {
2042 DRM_ERROR("allocate CSA failed %d\n", r);
2043 goto init_failed;
2044 }
2045 }
2046 }
2047 }
4587 if ((amdgpu_sriov_vf(ring->adev) || amdgpu_mcbp) && (ib->flags & AMDGPU_IB_FLAG_PREEMPT)) {
4588 control |= INDIRECT_BUFFER_PRE_ENB(1);
4589
4590 if (flags & AMDGPU_IB_PREEMPTED)
4591 control |= INDIRECT_BUFFER_PRE_RESUME(1);
4592
4593 if (!(ib->flags & AMDGPU_IB_FLAG_CE) && vmid)
4594 gfx_v10_0_ring_emit_de_meta(ring,
4595 (!amdgpu_sriov_vf(ring->adev) && flags & AMDGPU_IB_PREEMPTED) ? true : false);
4596 }
4742 static void gfx_v10_0_ring_emit_cntxcntl(struct amdgpu_ring *ring,
4743 uint32_t flags)
4744 {
4745 uint32_t dw2 = 0;
4746
4747 if (amdgpu_mcbp || amdgpu_sriov_vf(ring->adev))
4748 gfx_v10_0_ring_emit_ce_meta(ring,
4749 (!amdgpu_sriov_vf(ring->adev) && flags & AMDGPU_IB_PREEMPTED) ? true : false);
4750
4751 dw2 |= 0x80000000; /* set load_enable otherwise this package is just NOPs */
4752 if (flags & AMDGPU_HAVE_CTX_SWITCH) {
72
73 /* don't enable OS preemption on SDMA under SRIOV */
74 if (amdgpu_sriov_vf(adev) || vmid == 0 || !amdgpu_mcbp)
75 return 0;
76
77 r = amdgpu_sdma_get_index_from_ring(ring, &index);
78
79 if (r || index > 31)
80 csa_mc_addr = 0;
You need to change all the place refer to "amdgpu_mcbp", and remove the condition of " || amdgpu_srvio_vf()"
_____________________________________
Monk Liu|GPU Virtualization Team |AMD
-----Original Message-----
From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Emily.Deng
Sent: Monday, September 21, 2020 3:55 PM
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Deng, Emily <Emily.Deng@xxxxxxx>
Subject: [PATCH] drm/amdgpu/sriov: Enable the mcbp parameter for sriov
For debug convenient, reuse mcbp parameter for sriov mcbp
Signed-off-by: Emily.Deng <Emily.Deng@xxxxxxx>
Change-Id: If1222b2c050376feefb8fed4be58b4b87d36bd77
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 9 ++++++---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 +++--
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 3 ++-
3 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 5c2eb46e9b71..fcb6a41594db 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3197,15 +3197,18 @@ int amdgpu_device_init(struct amdgpu_device *adev,
amdgpu_device_get_pcie_info(adev);
-if (amdgpu_mcbp)
-DRM_INFO("MCBP is enabled\n");
-
if (amdgpu_mes && adev->asic_type >= CHIP_NAVI10)
adev->enable_mes = true;
/* detect hw virtualization here */
amdgpu_detect_virtualization(adev);
+if (amdgpu_mcbp == -1)
+amdgpu_mcbp = amdgpu_sriov_vf(adev) ? 1 : 0;
+
+if (amdgpu_mcbp)
+DRM_INFO("MCBP is enabled\n");
+
r = amdgpu_device_get_job_timeout_settings(adev);
if (r) {
dev_err(adev->dev, "invalid lockup_timeout parameter syntax\n"); diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 8d658d2a16fe..976d4f8ee2f1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -144,7 +144,7 @@ uint amdgpu_smu_memory_pool_size = 0; uint amdgpu_dc_feature_mask = 0; uint amdgpu_dc_debug_mask = 0; int amdgpu_async_gfx_ring = 1; -int amdgpu_mcbp = 0;
+int amdgpu_mcbp = -1;
int amdgpu_discovery = -1;
int amdgpu_mes = 0;
int amdgpu_noretry;
@@ -575,9 +575,10 @@ module_param_named(async_gfx_ring, amdgpu_async_gfx_ring, int, 0444);
* It is used to enable mid command buffer preemption. (0 = disabled (default), 1 = enabled)
*/
MODULE_PARM_DESC(mcbp,
-"Enable Mid-command buffer preemption (0 = disabled (default), 1 = enabled)");
+"Enable Mid-command buffer preemption (-1 = auto (default), 0 =
+disabled, 1 = enabled)");
module_param_named(mcbp, amdgpu_mcbp, int, 0444);
+
/**
* DOC: discovery (int)
* Allow driver to discover hardware IP information from IP Discovery table at the top of VRAM.
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index 2f53fa0ae9a6..cffa45a9481d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
@@ -236,7 +236,8 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
for (i = 0; i < num_ibs; ++i) {
ib = &ibs[i];
-
+if (!amdgpu_mcbp)
+ib->flags &= ~AMDGPU_IB_FLAG_PREEMPT;
/* drop preamble IBs if we don't have a context switch */
if ((ib->flags & AMDGPU_IB_FLAG_PREAMBLE) &&
skip_preamble &&
--
2.25.1
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