It makes nonsense to call gfxoff when smu failure has happened. Regards, Jiansong -----Original Message----- From: Chen, Guchun <Guchun.Chen@xxxxxxx> Sent: Monday, September 14, 2020 4:14 PM To: Chen, Jiansong (Simon) <Jiansong.Chen@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx Cc: Zhou1, Tao <Tao.Zhou1@xxxxxxx>; Feng, Kenneth <Kenneth.Feng@xxxxxxx>; Quan, Evan <Evan.Quan@xxxxxxx>; Chen, Jiansong (Simon) <Jiansong.Chen@xxxxxxx> Subject: RE: [PATCH] drm/amd/pm: support runtime pptable update for sienna_cichlid etc. [AMD Public Use] ret = smu_late_init(adev); + if (ret) + return ret; One counter leak happens? It needs to call amdgpu_gfx_off_ctrl(smu->adev, true) before returning? Regards, Guchun -----Original Message----- From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Jiansong Chen Sent: Monday, September 14, 2020 4:10 PM To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx Cc: Zhou1, Tao <Tao.Zhou1@xxxxxxx>; Feng, Kenneth <Kenneth.Feng@xxxxxxx>; Quan, Evan <Evan.Quan@xxxxxxx>; Chen, Jiansong (Simon) <Jiansong.Chen@xxxxxxx> Subject: [PATCH] drm/amd/pm: support runtime pptable update for sienna_cichlid etc. This avoids smu issue when enabling runtime pptable update for sienna_cichlid and so on. Runtime pptable udpate is needed for test and debug purpose. Signed-off-by: Jiansong Chen <Jiansong.Chen@xxxxxxx> Change-Id: I70b704ab4d6efd169f579c392e5dbc2737dc1fb2 --- drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c index 7a55ece1f124..7618f9972b8c 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c @@ -1129,7 +1129,7 @@ static int smu_disable_dpms(struct smu_context *smu) */ if (smu->uploading_custom_pp_table && (adev->asic_type >= CHIP_NAVI10) && - (adev->asic_type <= CHIP_NAVI12)) + (adev->asic_type <= CHIP_NAVY_FLOUNDER)) return 0; /* @@ -1214,7 +1214,9 @@ static int smu_hw_fini(void *handle) int smu_reset(struct smu_context *smu) { struct amdgpu_device *adev = smu->adev; - int ret = 0; + int ret; + + amdgpu_gfx_off_ctrl(smu->adev, false); ret = smu_hw_fini(adev); if (ret) @@ -1225,8 +1227,12 @@ int smu_reset(struct smu_context *smu) return ret; ret = smu_late_init(adev); + if (ret) + return ret; - return ret; + amdgpu_gfx_off_ctrl(smu->adev, true); + + return 0; } static int smu_suspend(void *handle) -- 2.25.1 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=02%7C01%7Cguchun.chen%40amd.com%7Cd73dd73ccf3c444c710508d858859f53%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637356678262125090&sdata=p0sqrDLhD4vaNesLHIq6Jfd57sAeu8wHDH69bDwTAvA%3D&reserved=0 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx