Re: [PATCH 1/1] drm/amdgpu: disable gpu-sched load balance for uvd

[Alex Deucher <alexdeucher@xxxxxxxxx>]

On Mon, Aug 31, 2020 at 5:50 PM Leo Liu <leo.liu@xxxxxxx> wrote:
>
>
> On 2020-08-31 1:39 p.m., Alex Deucher wrote:
> > On Mon, Aug 31, 2020 at 10:55 AM Nirmoy <nirmodas@xxxxxxx> wrote:
> >> Hi Alex,
> >>
> >> On 8/31/20 4:17 PM, Alex Deucher wrote:
> >>> On Mon, Aug 31, 2020 at 6:41 AM Nirmoy Das <nirmoy.das@xxxxxxx> wrote:
> >>>> UVD dependent jobs should run on the same udv instance.
> >>>> This patch disables gpu scheduler's load balancer for
> >>>> a context which binds jobs from same the context to a udv
> >>>> instance.
> >>> typos: udv -> uvd
> >>> With that fixed:
> >>> Reviewed-by: Alex Deucher <alexander.deucher@xxxxxxx>
> >>>
> >>> Does VCE need a similar fix?  What about UVD_ENC?
> >>
> >> I am not sure, can you please confirm this.
> > @Leo Liu can you confirm?
>
> Vega20 have 2 UVDs and 1 VCE, so UVD_ENC(AMDGPU_HW_IP_UVD_ENC) should
> need the same fix.

What about other chips?  Didn't CZ and tonga have two VCE instances?
I guess any engine with hw contexts needs this.

Alex


>
> Regards,
>
> Leo
>
>
>
> >
> > Alex
> >
> >>
> >> Nirmoy
> >>
> >>
> >>
> >>> Alex
> >>>
> >>>
> >>>> Signed-off-by: Nirmoy Das <nirmoy.das@xxxxxxx>
> >>>> ---
> >>>>    drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 4 +++-
> >>>>    1 file changed, 3 insertions(+), 1 deletion(-)
> >>>>
> >>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
> >>>> index 59032c26fc82..7cd398d25498 100644
> >>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
> >>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
> >>>> @@ -114,7 +114,9 @@ static int amdgpu_ctx_init_entity(struct amdgpu_ctx *ctx, u32 hw_ip,
> >>>>           scheds = adev->gpu_sched[hw_ip][hw_prio].sched;
> >>>>           num_scheds = adev->gpu_sched[hw_ip][hw_prio].num_scheds;
> >>>>
> >>>> -       if (hw_ip == AMDGPU_HW_IP_VCN_ENC || hw_ip == AMDGPU_HW_IP_VCN_DEC) {
> >>>> +       if (hw_ip == AMDGPU_HW_IP_VCN_ENC ||
> >>>> +           hw_ip == AMDGPU_HW_IP_VCN_DEC ||
> >>>> +           hw_ip == AMDGPU_HW_IP_UVD) {
> >>>>                   sched = drm_sched_pick_best(scheds, num_scheds);
> >>>>                   scheds = &sched;
> >>>>                   num_scheds = 1;
> >>>> --
> >>>> 2.28.0
> >>>>
> >>>> _______________________________________________
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