From: Colin Ian King <colin.king@xxxxxxxxxxxxx> The calculation of tmp64 is performed using a 32 bit multiply and then is stored in the uint64_t variable tmp64. This indicates that a 64 bit result may be expected, so cast crystal_clock_freq to a uint64_t to ensure a 64 bit multiplication is being performed to avoid any potential 32 bit overflow. Addresses-Coverity: ("Unintentional integer overflow)" Fixes: 13819ef6453c ("drm/amdgpu/swsmu: add smu11 helpers to get manual fan speeds") Signed-off-by: Colin Ian King <colin.king@xxxxxxxxxxxxx> --- drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c index d2a15e6f48be..0a5161d09722 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c @@ -1218,7 +1218,7 @@ int smu_v11_0_get_fan_speed_rpm(struct smu_context *smu, crystal_clock_freq = amdgpu_asic_get_xclk(adev); - tmp64 = 60 * crystal_clock_freq * 10000; + tmp64 = (uint64_t)crystal_clock_freq * 60 * 10000; do_div(tmp64, (tach_period * 8)); *speed = (uint32_t)tmp64; -- 2.27.0 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx