[AMD Official Use Only - Internal Distribution Only] Reviewed-by: Jiansong Chen <Jiansong.Chen@xxxxxxx> -----Original Message----- From: Wang, Kevin(Yang) <Kevin1.Wang@xxxxxxx> Sent: Monday, August 24, 2020 8:41 PM To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx Cc: Huang, Ray <Ray.Huang@xxxxxxx>; Deucher, Alexander <Alexander.Deucher@xxxxxxx>; Chen, Jiansong (Simon) <Jiansong.Chen@xxxxxxx>; Wang, Kevin(Yang) <Kevin1.Wang@xxxxxxx>; Chen, Jiansong (Simon) <Jiansong.Chen@xxxxxxx> Subject: [PATCH v2] drm/amd/pm: fix is_dpm_running() run error on 32bit system From: Kevin Wang <kevin1.wang@xxxxxxx> v1: the C type "unsigned long" size is 32bit on 32bit system, it will cause code logic error, so replace it with "uint64_t". v2: remove duplicate cast operation. Signed-off-by: Kevin <kevin1.wang@xxxxxxx> Suggest-by: Jiansong Chen <Jiansong.Chen@xxxxxxx> --- drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c | 10 +++++++--- drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 10 +++++++--- .../gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 10 +++++++--- 3 files changed, 21 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c index 8347b1f2509f..59b245c6c4d7 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c @@ -1844,10 +1844,14 @@ static bool arcturus_is_dpm_running(struct smu_context *smu) { int ret = 0; uint32_t feature_mask[2]; -unsigned long feature_enabled; +uint64_t feature_enabled; + ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2); -feature_enabled = (unsigned long)((uint64_t)feature_mask[0] | - ((uint64_t)feature_mask[1] << 32)); +if (ret) +return false; + +feature_enabled = (uint64_t)feature_mask[1] << 32 | feature_mask[0]; + return !!(feature_enabled & SMC_DPM_FEATURE); } diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c index 72f3d68691d8..cc67d5c60f3d 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c @@ -1345,10 +1345,14 @@ static bool navi10_is_dpm_running(struct smu_context *smu) { int ret = 0; uint32_t feature_mask[2]; -unsigned long feature_enabled; +uint64_t feature_enabled; + ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2); -feature_enabled = (unsigned long)((uint64_t)feature_mask[0] | - ((uint64_t)feature_mask[1] << 32)); +if (ret) +return false; + +feature_enabled = (uint64_t)feature_mask[1] << 32 | feature_mask[0]; + return !!(feature_enabled & SMC_DPM_FEATURE); } diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c index 66d655958a78..b48ac591db8b 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c @@ -1150,10 +1150,14 @@ static bool sienna_cichlid_is_dpm_running(struct smu_context *smu) { int ret = 0; uint32_t feature_mask[2]; -unsigned long feature_enabled; +uint64_t feature_enabled; + ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2); -feature_enabled = (unsigned long)((uint64_t)feature_mask[0] | - ((uint64_t)feature_mask[1] << 32)); +if (ret) +return false; + +feature_enabled = (uint64_t)feature_mask[1] << 32 | feature_mask[0]; + return !!(feature_enabled & SMC_DPM_FEATURE); } -- 2.27.0 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx