[AMD Official Use Only - Internal Distribution Only] Reviewed-by: Tao Zhou <tao.zhou1@xxxxxxx> > -----Original Message----- > From: Jiansong Chen <Jiansong.Chen@xxxxxxx> > Sent: Thursday, July 30, 2020 6:14 PM > To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx > Cc: Zhou1, Tao <Tao.Zhou1@xxxxxxx>; Chen, Jiansong (Simon) > <Jiansong.Chen@xxxxxxx> > Subject: [PATCH] drm/amdgpu: enable GFXOFF for navy_flounder > > Enable GFXOFF for navy_flounder. > > Signed-off-by: Jiansong Chen <Jiansong.Chen@xxxxxxx> > Change-Id: Ia49c1ad70e3521447b9db101f5c0eae70b1df665 > --- > drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 1 + > drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 1 + > 2 files changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c > b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c > index ca16f01956d3..fe8ccc9be682 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c > @@ -7529,6 +7529,7 @@ static int gfx_v10_0_set_powergating_state(void > *handle, > case CHIP_NAVI14: > case CHIP_NAVI12: > case CHIP_SIENNA_CICHLID: > +case CHIP_NAVY_FLOUNDER: > amdgpu_gfx_off_ctrl(adev, enable); > break; > default: > diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c > b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c > index a9453ec01619..7d7de854a826 100644 > --- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c > +++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c > @@ -1029,6 +1029,7 @@ int smu_v11_0_gfx_off_control(struct smu_context > *smu, bool enable) > case CHIP_NAVI14: > case CHIP_NAVI12: > case CHIP_SIENNA_CICHLID: > +case CHIP_NAVY_FLOUNDER: > if (!(adev->pm.pp_feature & PP_GFXOFF_MASK)) > return 0; > if (enable) > -- > 2.17.1 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx
