Hi Guchun, Since the adev variable invoked a few times, local adev make the code more concise. Thanks! Rico -----Original Message----- From: Chen, Guchun <Guchun.Chen@xxxxxxx> Sent: Tuesday, July 28, 2020 2:26 PM To: Yin, Tianci (Rico) <Tianci.Yin@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx Cc: Xu, Feifei <Feifei.Xu@xxxxxxx>; Yin, Tianci (Rico) <Tianci.Yin@xxxxxxx>; Tuikov, Luben <Luben.Tuikov@xxxxxxx>; Hesik, Christopher <Christopher.Hesik@xxxxxxx>; Deucher, Alexander <Alexander.Deucher@xxxxxxx>; Swamy, Manjunatha <Manjunatha.Swamy@xxxxxxx>; Quan, Evan <Evan.Quan@xxxxxxx>; Feng, Kenneth <Kenneth.Feng@xxxxxxx>; Zhang, Hawking <Hawking.Zhang@xxxxxxx> Subject: RE: [PATCH 2/2] drm/amdgpu: reconfigure spm golden settings on Navi1x after GFXOFF exit [AMD Public Use] One minor comment. Regards, Guchun -----Original Message----- From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Tianci Yin Sent: Tuesday, July 28, 2020 1:27 PM To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx Cc: Xu, Feifei <Feifei.Xu@xxxxxxx>; Yin, Tianci (Rico) <Tianci.Yin@xxxxxxx>; Tuikov, Luben <Luben.Tuikov@xxxxxxx>; Hesik, Christopher <Christopher.Hesik@xxxxxxx>; Deucher, Alexander <Alexander.Deucher@xxxxxxx>; Swamy, Manjunatha <Manjunatha.Swamy@xxxxxxx>; Quan, Evan <Evan.Quan@xxxxxxx>; Feng, Kenneth <Kenneth.Feng@xxxxxxx>; Zhang, Hawking <Hawking.Zhang@xxxxxxx> Subject: [PATCH 2/2] drm/amdgpu: reconfigure spm golden settings on Navi1x after GFXOFF exit From: "Tianci.Yin" <tianci.yin@xxxxxxx> On Navi1x, the SPM golden settings will be lost after GFXOFF enter/exit, reconfigure the golden settings after GFXOFF exit. Change-Id: I9358ba9c65f241c36f8a35916170b19535148ee9 Signed-off-by: Tianci.Yin <tianci.yin@xxxxxxx> --- drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c index 55463e7a11e2..5da0436d41e0 100644 --- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c +++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c @@ -1309,6 +1309,7 @@ static int smu_enable_umd_pstate(void *handle, struct smu_context *smu = (struct smu_context*)(handle); struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm); + struct amdgpu_device *adev = smu->adev; if (!smu->is_apu && !smu_dpm_ctx->dpm_context) return -EINVAL; @@ -1324,6 +1325,16 @@ static int smu_enable_umd_pstate(void *handle, amdgpu_device_ip_set_clockgating_state(smu->adev, [Guchun]Use the local adev instead of smu->adev? AMD_IP_BLOCK_TYPE_GFX, AMD_CG_STATE_UNGATE); + + if (adev->asic_type >= CHIP_NAVI10 && + adev->asic_type <= CHIP_NAVI12 && + (adev->pm.pp_feature & PP_GFXOFF_MASK)) { + if (adev->gfx.funcs->init_spm_golden) { + dev_dbg(adev->dev,"GFXOFF exited, re-init SPM golden settings\n"); + amdgpu_gfx_init_spm_golden(adev); + } else + dev_warn(adev->dev,"Callback init_spm_golden is NULL\n"); + } } } else { /* exit umd pstate, restore level, enable gfx cg*/ -- 2.17.1 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=02%7C01%7Cguchun.chen%40amd.com%7Ce6176c766fe747a6fe1a08d832b6ee3c%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637315108573876551&sdata=43GHkX%2FCRLsfMmNxurLMIZy4l4ElUB2tnslPyfT7NJg%3D&reserved=0 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx