[AMD Official Use Only - Internal Distribution Only] Thanks. Reviewed-by: Evan Quan <evan.quan@xxxxxxx> -----Original Message----- From: Zhu, Changfeng <Changfeng.Zhu@xxxxxxx> Sent: Friday, July 24, 2020 2:16 PM To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx; Quan, Evan <Evan.Quan@xxxxxxx> Cc: Zhu, Changfeng <Changfeng.Zhu@xxxxxxx> Subject: [PATCH] drm/amd/powerplay: drop unnecessary message support check(v2) From: changzhu <Changfeng.Zhu@xxxxxxx> From: Changfeng <Changfeng.Zhu@xxxxxxx> Take back patch:drop unnecessary message support check Because the gpu reset fail problem on renoir can be fixed by: drm/amd/powerplay: skip invalid msg when smu set mp1 state It needs to remove SWSMU_CODE_LAYER_L1 in smu_cmn.h to guard a clear code layer. Change-Id: I30cc2b435191ab243c6292ae58c6c099557d9bd9 Signed-off-by: changfeng <Changfeng.Zhu@xxxxxxx> --- drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 9 --------- drivers/gpu/drm/amd/powerplay/smu_cmn.h | 2 +- 2 files changed, 1 insertion(+), 10 deletions(-) diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c index 4cf37fe20935..34c7eaf64010 100644 --- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c +++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c @@ -34,7 +34,6 @@ #include "sienna_cichlid_ppt.h" #include "renoir_ppt.h" #include "amd_pcie.h" -#include "smu_cmn.h" /* * DO NOT use these for err/warn/info/debug messages. @@ -1590,14 +1589,6 @@ int smu_set_mp1_state(struct smu_context *smu, return 0; } -/* some asics may not support those messages */ -if (smu_cmn_to_asic_specific_index(smu, - CMN2ASIC_MAPPING_MSG, - msg) < 0) { -mutex_unlock(&smu->mutex); -return 0; -} - ret = smu_send_smc_msg(smu, msg, NULL); /* some asics may not support those messages */ if (ret == -EINVAL) diff --git a/drivers/gpu/drm/amd/powerplay/smu_cmn.h b/drivers/gpu/drm/amd/powerplay/smu_cmn.h index f9e63f18b157..98face8c5fd6 100644 --- a/drivers/gpu/drm/amd/powerplay/smu_cmn.h +++ b/drivers/gpu/drm/amd/powerplay/smu_cmn.h @@ -25,7 +25,7 @@ #include "amdgpu_smu.h" -#if defined(SWSMU_CODE_LAYER_L1) || defined(SWSMU_CODE_LAYER_L2) || defined(SWSMU_CODE_LAYER_L3) || defined(SWSMU_CODE_LAYER_L4) +#if defined(SWSMU_CODE_LAYER_L2) || defined(SWSMU_CODE_LAYER_L3) || defined(SWSMU_CODE_LAYER_L4) int smu_cmn_send_smc_msg_with_param(struct smu_context *smu, enum smu_message_type msg, uint32_t param, -- 2.17.1 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx