On Wed, Jul 22, 2020 at 04:00:45PM +0800, Zhu, Changfeng wrote: > From: changzhu <Changfeng.Zhu@xxxxxxx> > > From: Changfeng <Changfeng.Zhu@xxxxxxx> > > The below 3 messages are not supported on Renoir > SMU_MSG_PrepareMp1ForShutdown > SMU_MSG_PrepareMp1ForUnload > SMU_MSG_PrepareMp1ForReset > > It needs to revert patch: > drm/amd/powerplay: drop unnecessary message support check > to avoid set mp1 state fail during gpu reset on renoir. > > Change-Id: Ib34d17ab88e1c88173827cca962d8154ad883ab7 > Signed-off-by: changfeng <Changfeng.Zhu@xxxxxxx> Acked-by: Huang Rui <ray.huang@xxxxxxx> > --- > drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 9 +++++++++ > drivers/gpu/drm/amd/powerplay/smu_cmn.h | 2 +- > 2 files changed, 10 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c > index 838a369c9ec3..f778b00e49eb 100644 > --- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c > +++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c > @@ -34,6 +34,7 @@ > #include "sienna_cichlid_ppt.h" > #include "renoir_ppt.h" > #include "amd_pcie.h" > +#include "smu_cmn.h" > > /* > * DO NOT use these for err/warn/info/debug messages. > @@ -1589,6 +1590,14 @@ int smu_set_mp1_state(struct smu_context *smu, > return 0; > } > > + /* some asics may not support those messages */ > + if (smu_cmn_to_asic_specific_index(smu, > + CMN2ASIC_MAPPING_MSG, > + msg) < 0) { > + mutex_unlock(&smu->mutex); > + return 0; > + } > + > ret = smu_send_smc_msg(smu, msg, NULL); > if (ret) > dev_err(smu->adev->dev, "[PrepareMp1] Failed!\n"); > diff --git a/drivers/gpu/drm/amd/powerplay/smu_cmn.h b/drivers/gpu/drm/amd/powerplay/smu_cmn.h > index 98face8c5fd6..f9e63f18b157 100644 > --- a/drivers/gpu/drm/amd/powerplay/smu_cmn.h > +++ b/drivers/gpu/drm/amd/powerplay/smu_cmn.h > @@ -25,7 +25,7 @@ > > #include "amdgpu_smu.h" > > -#if defined(SWSMU_CODE_LAYER_L2) || defined(SWSMU_CODE_LAYER_L3) || defined(SWSMU_CODE_LAYER_L4) > +#if defined(SWSMU_CODE_LAYER_L1) || defined(SWSMU_CODE_LAYER_L2) || defined(SWSMU_CODE_LAYER_L3) || defined(SWSMU_CODE_LAYER_L4) > int smu_cmn_send_smc_msg_with_param(struct smu_context *smu, > enum smu_message_type msg, > uint32_t param, > -- > 2.17.1 > _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx