Hi Christian, On Mon, Jul 20, 2020 at 11:00 AM Christian König <ckoenig.leichtzumerken@xxxxxxxxx> wrote: > > Hi Mauro, > > I'm not deep into the whole DC design, so just some general high level > comments on the cover letter: > > 1. Please add a subject line to the cover letter, my spam filter thinks > that this is suspicious otherwise. My mistake in the editing of covert letter with git send-email, I may have forgot to keep the Subject at the top > > 2. Then you should probably note how well (badly?) is that tested. Since > you noted proof of concept it might not even work. The Changelog is to be read as: [RFC] was the initial Proof of concept was the RFC and [PATCH v2] was just a rebase onto amd-staging-drm-next this series [PATCH v3] has all the known changes required for DCE6 specificity and based on a long offline thread with Alexander Deutcher and past dri-devel chats with Harry Wentland. It was tested for my possibilities of testing with HD7750 and HD7950, with checks in dmesg output for not getting "missing registers/masks" kernel WARNING and with kernel build on Ubuntu 20.04 and with android-x86 The proposal I made to Alex is that AMD testing systems will be used for further regression testing, as part of review and validation for eligibility to amd-staging-drm-next > > 3. How feature complete (HDMI audio?, Freesync?) is it? All the changes in DC impacting DCE8 (dc/dce80 path) were ported to DCE6 (dc/dce60 path) in the last two years from initial submission > > Apart from that it looks like a rather impressive piece of work :) > > Cheers, > Christian. Thanks, please consider that most of the latest DCE6 specific parts were possible due to recent Alex support in getting the correct DCE6 headers, his suggestions and continuous feedback. I would suggest that Alex comments on the proposed next steps to follow. Mauro > > Am 16.07.20 um 23:22 schrieb Mauro Rossi: > > The series adds SI support to AMD DC > > > > Changelog: > > > > [RFC] > > Preliminar Proof Of Concept, with DCE8 headers still used in dce60_resources.c > > > > [PATCH v2] > > Rebase on amd-staging-drm-next dated 17-Oct-2018 > > > > [PATCH v3] > > Add support for DCE6 specific headers, > > ad hoc DCE6 macros, funtions and fixes, > > rebase on current amd-staging-drm-next > > > > > > Commits [01/27]..[08/27] SI support added in various DC components > > > > [PATCH v3 01/27] drm/amdgpu: add some required DCE6 registers (v6) > > [PATCH v3 02/27] drm/amd/display: add asics info for SI parts > > [PATCH v3 03/27] drm/amd/display: dc/dce: add initial DCE6 support (v9b) > > [PATCH v3 04/27] drm/amd/display: dc/core: add SI/DCE6 support (v2) > > [PATCH v3 05/27] drm/amd/display: dc/bios: add support for DCE6 > > [PATCH v3 06/27] drm/amd/display: dc/gpio: add support for DCE6 (v2) > > [PATCH v3 07/27] drm/amd/display: dc/irq: add support for DCE6 (v4) > > [PATCH v3 08/27] drm/amd/display: amdgpu_dm: add SI support (v4) > > > > Commits [09/27]..[24/27] DCE6 specific code adaptions > > > > [PATCH v3 09/27] drm/amd/display: dc/clk_mgr: add support for SI parts (v2) > > [PATCH v3 10/27] drm/amd/display: dc/dce60: set max_cursor_size to 64 > > [PATCH v3 11/27] drm/amd/display: dce_audio: add DCE6 specific macros,functions > > [PATCH v3 12/27] drm/amd/display: dce_dmcu: add DCE6 specific macros > > [PATCH v3 13/27] drm/amd/display: dce_hwseq: add DCE6 specific macros,functions > > [PATCH v3 14/27] drm/amd/display: dce_ipp: add DCE6 specific macros,functions > > [PATCH v3 15/27] drm/amd/display: dce_link_encoder: add DCE6 specific macros,functions > > [PATCH v3 16/27] drm/amd/display: dce_mem_input: add DCE6 specific macros,functions > > [PATCH v3 17/27] drm/amd/display: dce_opp: add DCE6 specific macros,functions > > [PATCH v3 18/27] drm/amd/display: dce_transform: add DCE6 specific macros,functions > > [PATCH v3 19/27] drm/amdgpu: add some required DCE6 registers (v7) > > [PATCH v3 20/27] drm/amd/display: dce_transform: DCE6 Scaling Horizontal Filter Init > > [PATCH v3 21/27] drm/amd/display: dce60_hw_sequencer: add DCE6 macros,functions > > [PATCH v3 22/27] drm/amd/display: dce60_hw_sequencer: add DCE6 specific .cursor_lock > > [PATCH v3 23/27] drm/amd/display: dce60_timing_generator: add DCE6 specific functions > > [PATCH v3 24/27] drm/amd/display: dc/dce60: use DCE6 headers (v6) > > > > > > Commits [25/27]..[27/27] SI support final enablements > > > > [PATCH v3 25/27] drm/amd/display: create plane rotation property for Bonarie and later > > [PATCH v3 26/27] drm/amdgpu: enable DC support for SI parts (v2) > > [PATCH v3 27/27] drm/amd/display: enable SI support in the Kconfig (v2) > > > > > > Signed-off-by: Mauro Rossi <issor.oruam@xxxxxxxxx> > > > > _______________________________________________ > > amd-gfx mailing list > > amd-gfx@xxxxxxxxxxxxxxxxxxxxx > > https://lists.freedesktop.org/mailman/listinfo/amd-gfx > _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx
