From: Jiansong Chen <Jiansong.Chen@xxxxxxx> navy_flounder has one VCN instance, and the work around is to avoid smu reponse error when setting VCN1 pg for the chip. It is preferred VCN0 and VCN1 are separated for the pg setting so better power efficiency can be achieved. Signed-off-by: Jiansong Chen <Jiansong.Chen@xxxxxxx> Reviewed-by: Kenneth Feng <kenneth.feng@xxxxxxx> Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx> --- .../drm/amd/powerplay/sienna_cichlid_ppt.c | 20 +++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c index 79d7159a871e..c74c4e866859 100644 --- a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c +++ b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c @@ -644,6 +644,8 @@ static int sienna_cichlid_dpm_set_vcn_enable(struct smu_context *smu, bool enabl { struct smu_power_context *smu_power = &smu->smu_power; struct smu_power_gate *power_gate = &smu_power->power_gate; + struct amdgpu_device *adev = smu->adev; + int ret = 0; if (enable) { @@ -652,9 +654,12 @@ static int sienna_cichlid_dpm_set_vcn_enable(struct smu_context *smu, bool enabl ret = smu_send_smc_msg_with_param(smu, SMU_MSG_PowerUpVcn, 0, NULL); if (ret) return ret; - ret = smu_send_smc_msg_with_param(smu, SMU_MSG_PowerUpVcn, 0x10000, NULL); - if (ret) - return ret; + if (adev->asic_type == CHIP_SIENNA_CICHLID) { + ret = smu_send_smc_msg_with_param(smu, SMU_MSG_PowerUpVcn, + 0x10000, NULL); + if (ret) + return ret; + } } power_gate->vcn_gated = false; } else { @@ -662,9 +667,12 @@ static int sienna_cichlid_dpm_set_vcn_enable(struct smu_context *smu, bool enabl ret = smu_send_smc_msg_with_param(smu, SMU_MSG_PowerDownVcn, 0, NULL); if (ret) return ret; - ret = smu_send_smc_msg_with_param(smu, SMU_MSG_PowerDownVcn, 0x10000, NULL); - if (ret) - return ret; + if (adev->asic_type == CHIP_SIENNA_CICHLID) { + ret = smu_send_smc_msg_with_param(smu, SMU_MSG_PowerDownVcn, + 0x10000, NULL); + if (ret) + return ret; + } } power_gate->vcn_gated = true; } -- 2.25.4 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx