[AMD Official Use Only - Internal Distribution Only] That's because pr_warn/err/info are forbidden to use in power routines. /* * DO NOT use these for err/warn/info/debug messages. * Use dev_err, dev_warn, dev_info and dev_dbg instead. * They are more MGPU friendly. */ #undef pr_err #undef pr_warn #undef pr_info #undef pr_debug BR Evan -----Original Message----- From: Alex Deucher <alexdeucher@xxxxxxxxx> Sent: Tuesday, June 30, 2020 12:25 AM To: Quan, Evan <Evan.Quan@xxxxxxx> Cc: amd-gfx list <amd-gfx@xxxxxxxxxxxxxxxxxxxxx>; Deucher, Alexander <Alexander.Deucher@xxxxxxx>; kernel test robot <lkp@xxxxxxxxx> Subject: Re: [PATCH] drm/amd/powerplay: fix compile error with ARCH=arc On Sun, Jun 28, 2020 at 7:19 AM Evan Quan <evan.quan@xxxxxxx> wrote: > > Fix the compile error below: > drivers/gpu/drm/amd/amdgpu/../powerplay/smu_v11_0.c: In function 'smu_v11_0_init_microcode': > >> arch/arc/include/asm/bug.h:22:2: error: implicit declaration of > >> function 'pr_warn'; did you mean 'pci_warn'? > >> [-Werror=implicit-function-declaration] > 22 | pr_warn("BUG: failure at %s:%d/%s()!\n", __FILE__, __LINE__, __func__); \ > | ^~~~~~~ > drivers/gpu/drm/amd/amdgpu/../powerplay/smu_v11_0.c:176:3: note: in expansion of macro 'BUG' > 176 | BUG(); > > Change-Id: I4e969082c41f8a8c91f1b0d19eb853eb0a2e0c0d > Reported-by: kernel test robot <lkp@xxxxxxxxx> > Signed-off-by: Evan Quan <evan.quan@xxxxxxx> I think this is probably a missing include. We use BUG() elsewhere in the driver with no problems. Alex > --- > drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c > b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c > index 677f8adb920c..48e15885e9c3 100644 > --- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c > +++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c > @@ -173,7 +173,8 @@ int smu_v11_0_init_microcode(struct smu_context *smu) > chip_name = "sienna_cichlid"; > break; > default: > - BUG(); > + dev_err(adev->dev, "Unsupported ASIC type %d\n", adev->asic_type); > + return -EINVAL; > } > > snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_smc.bin", > chip_name); > -- > 2.27.0 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@xxxxxxxxxxxxxxxxxxxxx > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flist > s.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=02%7C01%7Cev > an.quan%40amd.com%7C2962b4be8d5e4e72009308d81c49098d%7C3dd8961fe4884e6 > 08e11a82d994e183d%7C0%7C0%7C637290447307762780&sdata=v5oJldXwh7UQN > e0ETjZ048xkqODiPe6LiwmMIHu0Ur8%3D&reserved=0 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx