[PATCH] drm/amdgpu/vcn: fix cast to restricted __le32 warning

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le32_to_cpu's argument needs explicitly be data type  __le32.

Signed-off-by: James Zhu <James.Zhu@xxxxxxx>
Reported-by: kernel test robot <lkp@xxxxxxxxx>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 28 ++++++++++++-------------
 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c   |  2 +-
 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c   |  2 +-
 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c   |  4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c   |  4 ++--
 5 files changed, 20 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
index 15ff30c53e24..fa7735932be8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
@@ -136,7 +136,7 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
 	}
 
 	hdr = (const struct common_firmware_header *)adev->vcn.fw->data;
-	adev->vcn.fw_version = le32_to_cpu(hdr->ucode_version);
+	adev->vcn.fw_version = le32_to_cpu((__le32)hdr->ucode_version);
 
 	/* Bit 20-23, it is encode major and non-zero for new naming convention.
 	 * This field is part of version minor and DRM_DISABLED_FLAG in old naming
@@ -144,30 +144,30 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
 	 * is zero in old naming convention, this field is always zero so far.
 	 * These four bits are used to tell which naming convention is present.
 	 */
-	fw_check = (le32_to_cpu(hdr->ucode_version) >> 20) & 0xf;
+	fw_check = (le32_to_cpu((__le32)hdr->ucode_version) >> 20) & 0xf;
 	if (fw_check) {
 		unsigned int dec_ver, enc_major, enc_minor, vep, fw_rev;
 
-		fw_rev = le32_to_cpu(hdr->ucode_version) & 0xfff;
-		enc_minor = (le32_to_cpu(hdr->ucode_version) >> 12) & 0xff;
+		fw_rev = le32_to_cpu((__le32)hdr->ucode_version) & 0xfff;
+		enc_minor = (le32_to_cpu((__le32)hdr->ucode_version) >> 12) & 0xff;
 		enc_major = fw_check;
-		dec_ver = (le32_to_cpu(hdr->ucode_version) >> 24) & 0xf;
-		vep = (le32_to_cpu(hdr->ucode_version) >> 28) & 0xf;
+		dec_ver = (le32_to_cpu((__le32)hdr->ucode_version) >> 24) & 0xf;
+		vep = (le32_to_cpu((__le32)hdr->ucode_version) >> 28) & 0xf;
 		DRM_INFO("Found VCN firmware Version ENC: %hu.%hu DEC: %hu VEP: %hu Revision: %hu\n",
 			enc_major, enc_minor, dec_ver, vep, fw_rev);
 	} else {
 		unsigned int version_major, version_minor, family_id;
 
-		family_id = le32_to_cpu(hdr->ucode_version) & 0xff;
-		version_major = (le32_to_cpu(hdr->ucode_version) >> 24) & 0xff;
-		version_minor = (le32_to_cpu(hdr->ucode_version) >> 8) & 0xff;
+		family_id = le32_to_cpu((__le32)hdr->ucode_version) & 0xff;
+		version_major = (le32_to_cpu((__le32)hdr->ucode_version) >> 24) & 0xff;
+		version_minor = (le32_to_cpu((__le32)hdr->ucode_version) >> 8) & 0xff;
 		DRM_INFO("Found VCN firmware Version: %hu.%hu Family ID: %hu\n",
 			version_major, version_minor, family_id);
 	}
 
 	bo_size = AMDGPU_VCN_STACK_SIZE + AMDGPU_VCN_CONTEXT_SIZE;
 	if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP)
-		bo_size += AMDGPU_GPU_PAGE_ALIGN(le32_to_cpu(hdr->ucode_size_bytes) + 8);
+		bo_size += AMDGPU_GPU_PAGE_ALIGN(le32_to_cpu((__le32)hdr->ucode_size_bytes) + 8);
 
 	for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
 		if (adev->vcn.harvest_config & (1 << i))
@@ -306,11 +306,11 @@ int amdgpu_vcn_resume(struct amdgpu_device *adev)
 
 			hdr = (const struct common_firmware_header *)adev->vcn.fw->data;
 			if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) {
-				offset = le32_to_cpu(hdr->ucode_array_offset_bytes);
+				offset = le32_to_cpu((__le32)hdr->ucode_array_offset_bytes);
 				memcpy_toio(adev->vcn.inst[i].cpu_addr, adev->vcn.fw->data + offset,
-					    le32_to_cpu(hdr->ucode_size_bytes));
-				size -= le32_to_cpu(hdr->ucode_size_bytes);
-				ptr += le32_to_cpu(hdr->ucode_size_bytes);
+					    le32_to_cpu((__le32)hdr->ucode_size_bytes));
+				size -= le32_to_cpu((__le32)hdr->ucode_size_bytes);
+				ptr += le32_to_cpu((__le32)hdr->ucode_size_bytes);
 			}
 			memset_io(ptr, 0, size);
 		}
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
index 6dcc3ce0c00a..23d8c192ff34 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
@@ -118,7 +118,7 @@ static int vcn_v1_0_sw_init(void *handle)
 		adev->firmware.ucode[AMDGPU_UCODE_ID_VCN].ucode_id = AMDGPU_UCODE_ID_VCN;
 		adev->firmware.ucode[AMDGPU_UCODE_ID_VCN].fw = adev->vcn.fw;
 		adev->firmware.fw_size +=
-			ALIGN(le32_to_cpu(hdr->ucode_size_bytes), PAGE_SIZE);
+			ALIGN(le32_to_cpu((__le32)hdr->ucode_size_bytes), PAGE_SIZE);
 		DRM_INFO("PSP loading VCN firmware\n");
 	}
 
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
index c0e4133a6dd5..c8ff3f632eb1 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
@@ -121,7 +121,7 @@ static int vcn_v2_0_sw_init(void *handle)
 		adev->firmware.ucode[AMDGPU_UCODE_ID_VCN].ucode_id = AMDGPU_UCODE_ID_VCN;
 		adev->firmware.ucode[AMDGPU_UCODE_ID_VCN].fw = adev->vcn.fw;
 		adev->firmware.fw_size +=
-			ALIGN(le32_to_cpu(hdr->ucode_size_bytes), PAGE_SIZE);
+			ALIGN(le32_to_cpu((__le32)hdr->ucode_size_bytes), PAGE_SIZE);
 		DRM_INFO("PSP loading VCN firmware\n");
 	}
 
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
index e99bef6e2354..06c2f7ef1935 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
@@ -149,13 +149,13 @@ static int vcn_v2_5_sw_init(void *handle)
 		adev->firmware.ucode[AMDGPU_UCODE_ID_VCN].ucode_id = AMDGPU_UCODE_ID_VCN;
 		adev->firmware.ucode[AMDGPU_UCODE_ID_VCN].fw = adev->vcn.fw;
 		adev->firmware.fw_size +=
-			ALIGN(le32_to_cpu(hdr->ucode_size_bytes), PAGE_SIZE);
+			ALIGN(le32_to_cpu((__le32)hdr->ucode_size_bytes), PAGE_SIZE);
 
 		if (adev->vcn.num_vcn_inst == VCN25_MAX_HW_INSTANCES_ARCTURUS) {
 			adev->firmware.ucode[AMDGPU_UCODE_ID_VCN1].ucode_id = AMDGPU_UCODE_ID_VCN1;
 			adev->firmware.ucode[AMDGPU_UCODE_ID_VCN1].fw = adev->vcn.fw;
 			adev->firmware.fw_size +=
-				ALIGN(le32_to_cpu(hdr->ucode_size_bytes), PAGE_SIZE);
+				ALIGN(le32_to_cpu((__le32)hdr->ucode_size_bytes), PAGE_SIZE);
 		}
 		DRM_INFO("PSP loading VCN firmware\n");
 	}
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
index 90fe95f345e3..bb8075975ef4 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
@@ -121,13 +121,13 @@ static int vcn_v3_0_sw_init(void *handle)
 		adev->firmware.ucode[AMDGPU_UCODE_ID_VCN].ucode_id = AMDGPU_UCODE_ID_VCN;
 		adev->firmware.ucode[AMDGPU_UCODE_ID_VCN].fw = adev->vcn.fw;
 		adev->firmware.fw_size +=
-			ALIGN(le32_to_cpu(hdr->ucode_size_bytes), PAGE_SIZE);
+			ALIGN(le32_to_cpu((__le32)hdr->ucode_size_bytes), PAGE_SIZE);
 
 		if (adev->vcn.num_vcn_inst == VCN_INSTANCES_SIENNA_CICHLID) {
 			adev->firmware.ucode[AMDGPU_UCODE_ID_VCN1].ucode_id = AMDGPU_UCODE_ID_VCN1;
 			adev->firmware.ucode[AMDGPU_UCODE_ID_VCN1].fw = adev->vcn.fw;
 			adev->firmware.fw_size +=
-				ALIGN(le32_to_cpu(hdr->ucode_size_bytes), PAGE_SIZE);
+				ALIGN(le32_to_cpu((__le32)hdr->ucode_size_bytes), PAGE_SIZE);
 		}
 		DRM_INFO("PSP loading VCN firmware\n");
 	}
-- 
2.17.1

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