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[AMD Public Use]
sure
Thanks & Best Regards!
James Zhu From: Deucher, Alexander <Alexander.Deucher@xxxxxxx>
Sent: Wednesday, June 17, 2020 4:53 PM To: Zhu, James <James.Zhu@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx <amd-gfx@xxxxxxxxxxxxxxxxxxxxx> Cc: kernel test robot <lkp@xxxxxxxxx> Subject: Re: [PATCH] drm/amdgpu: vcn_v2_5_mc_resume_dpg_mode() can be static
[AMD Public Use]
James, please feel free to commit this.
Alex
From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> on behalf of James Zhu <James.Zhu@xxxxxxx>
Sent: Wednesday, June 17, 2020 4:41 PM To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx <amd-gfx@xxxxxxxxxxxxxxxxxxxxx> Cc: Zhu, James <James.Zhu@xxxxxxx>; kernel test robot <lkp@xxxxxxxxx> Subject: [PATCH] drm/amdgpu: vcn_v2_5_mc_resume_dpg_mode() can be static From: kernel test robot <lkp@xxxxxxxxx>
Fixes: c422a628925d ("drm/amdgpu: rename macro for VCN2.0 2.5 and 3.0") Signed-off-by: kernel test robot <lkp@xxxxxxxxx> Signed-off-by: James Zhu <James.Zhu@xxxxxxx> --- drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c index 261afbb504bd..ba1c4fbc19dc 100644 --- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c @@ -443,7 +443,7 @@ static void vcn_v2_5_mc_resume(struct amdgpu_device *adev) } } -void vcn_v2_5_mc_resume_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) +static void vcn_v2_5_mc_resume_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) { uint32_t size = AMDGPU_GPU_PAGE_ALIGN(adev->vcn.fw->size + 4); uint32_t offset; @@ -657,7 +657,7 @@ static void vcn_v2_5_disable_clock_gating(struct amdgpu_device *adev) } } -void vcn_v2_5_clock_gating_dpg_mode(struct amdgpu_device *adev, +static void vcn_v2_5_clock_gating_dpg_mode(struct amdgpu_device *adev, uint8_t sram_sel, int inst_idx, uint8_t indirect) { uint32_t reg_data = 0; @@ -1300,7 +1300,7 @@ static int vcn_v2_5_sriov_start(struct amdgpu_device *adev) return vcn_v2_5_mmsch_start(adev, &adev->virt.mm_table); } -int vcn_v2_5_stop_dpg_mode(struct amdgpu_device *adev, int inst_idx) +static int vcn_v2_5_stop_dpg_mode(struct amdgpu_device *adev, int inst_idx) { int ret_code = 0; uint32_t tmp; -- 2.17.1 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://nam11.safelinks.protection.outlook.com/?url=""> |
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