Re: [PATCH 7/9] drm/amd/powerplay: clean up the SMU hw setup operations

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On Mon, Jun 1, 2020 at 3:31 AM Evan Quan <evan.quan@xxxxxxx> wrote:
>
> Postpone some operations which are not must for hw setup to
> late_init. Thus, code sharing is possible between hw_init/fini and
> suspend/resume. Also this makes code more clean and readable.
>
> Change-Id: Id3996fd9e2dbf2ff59d8a6032cc5f6730db1295c
> Signed-off-by: Evan Quan <evan.quan@xxxxxxx>

I'm having trouble parsing all of the changes in this patch.  I get
the general idea, but Is there any way to break this up into more
logical patches or provide a more detailed description?

Alex

> ---
>  drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 327 ++++++++++-----------
>  1 file changed, 157 insertions(+), 170 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
> index 9b81b6519a96..e55c6458b212 100644
> --- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
> +++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
> @@ -789,10 +789,36 @@ static int smu_late_init(void *handle)
>  {
>         struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>         struct smu_context *smu = &adev->smu;
> +       int ret = 0;
>
>         if (!smu->pm_enabled)
>                 return 0;
>
> +       ret = smu_set_default_od_settings(smu);
> +       if (ret)
> +               return ret;
> +
> +       /*
> +        * Set initialized values (get from vbios) to dpm tables context such as
> +        * gfxclk, memclk, dcefclk, and etc. And enable the DPM feature for each
> +        * type of clks.
> +        */
> +       ret = smu_populate_smc_tables(smu);
> +       if (ret)
> +               return ret;
> +
> +       ret = smu_init_max_sustainable_clocks(smu);
> +       if (ret)
> +               return ret;
> +
> +       ret = smu_populate_umd_state_clk(smu);
> +       if (ret)
> +               return ret;
> +
> +       ret = smu_get_power_limit(smu, &smu->default_power_limit, false, false);
> +       if (ret)
> +               return ret;
> +
>         smu_handle_task(&adev->smu,
>                         smu->smu_dpm.dpm_level,
>                         AMD_PP_TASK_COMPLETE_INIT,
> @@ -1107,8 +1133,7 @@ static int smu_sw_fini(void *handle)
>         return 0;
>  }
>
> -static int smu_smc_table_hw_init(struct smu_context *smu,
> -                                bool initialize)
> +static int smu_internal_hw_setup(struct smu_context *smu)
>  {
>         struct amdgpu_device *adev = smu->adev;
>         int ret;
> @@ -1122,26 +1147,22 @@ static int smu_smc_table_hw_init(struct smu_context *smu,
>         if (ret)
>                 return ret;
>
> -       if (initialize) {
> -               /* get boot_values from vbios to set revision, gfxclk, and etc. */
> -               ret = smu_get_vbios_bootup_values(smu);
> -               if (ret)
> -                       return ret;
> -
> -               ret = smu_setup_pptable(smu);
> -               if (ret)
> -                       return ret;
> +       ret = smu_set_driver_table_location(smu);
> +       if (ret)
> +               return ret;
>
> -               /*
> -                * Send msg GetDriverIfVersion to check if the return value is equal
> -                * with DRIVER_IF_VERSION of smc header.
> -                */
> -               ret = smu_check_fw_version(smu);
> -               if (ret)
> -                       return ret;
> -       }
> +       /*
> +        * Set PMSTATUSLOG table bo address with SetToolsDramAddr MSG for tools.
> +        */
> +       ret = smu_set_tool_table_location(smu);
> +       if (ret)
> +               return ret;
>
> -       ret = smu_set_driver_table_location(smu);
> +       /*
> +        * Use msg SetSystemVirtualDramAddr and DramLogSetDramAddr can notify
> +        * pool location.
> +        */
> +       ret = smu_notify_memory_pool_location(smu);
>         if (ret)
>                 return ret;
>
> @@ -1158,6 +1179,11 @@ static int smu_smc_table_hw_init(struct smu_context *smu,
>         ret = smu_run_btc(smu);
>         if (ret)
>                 return ret;
> +
> +       ret = smu_feature_init_dpm(smu);
> +       if (ret)
> +               return ret;
> +
>         ret = smu_feature_set_allowed_mask(smu);
>         if (ret)
>                 return ret;
> @@ -1166,12 +1192,19 @@ static int smu_smc_table_hw_init(struct smu_context *smu,
>         if (ret)
>                 return ret;
>
> +       if (!smu_is_dpm_running(smu))
> +               pr_info("dpm has been disabled\n");
> +
>         ret = smu_disable_umc_cdr_12gbps_workaround(smu);
>         if (ret) {
>                 pr_err("Workaround failed to disable UMC CDR feature on 12Gbps SKU!\n");
>                 return ret;
>         }
>
> +       ret = smu_override_pcie_parameters(smu);
> +       if (ret)
> +               return ret;
> +
>         /*
>          * For Navi1X, manually switch it to AC mode as PMFW
>          * may boot it with DC mode.
> @@ -1184,6 +1217,14 @@ static int smu_smc_table_hw_init(struct smu_context *smu,
>                 return ret;
>         }
>
> +       ret = smu_enable_thermal_alert(smu);
> +       if (ret)
> +               return ret;
> +
> +       ret = smu_i2c_eeprom_init(smu, &adev->pm.smu_i2c);
> +       if (ret)
> +               return ret;
> +
>         ret = smu_notify_display_change(smu);
>         if (ret)
>                 return ret;
> @@ -1193,51 +1234,89 @@ static int smu_smc_table_hw_init(struct smu_context *smu,
>          * SetMinDeepSleepDcefclk MSG.
>          */
>         ret = smu_set_min_dcef_deep_sleep(smu);
> -       if (ret)
> -               return ret;
> +
> +       return ret;
> +}
> +
> +static int smu_disable_dpms(struct smu_context *smu)
> +{
> +       struct amdgpu_device *adev = smu->adev;
> +       int ret = 0;
> +       bool use_baco = !smu->is_apu &&
> +               ((adev->in_gpu_reset &&
> +                 (amdgpu_asic_reset_method(adev) == AMD_RESET_METHOD_BACO)) ||
> +                ((adev->in_runpm || adev->in_hibernate) && amdgpu_asic_supports_baco(adev)));
>
>         /*
> -        * Set initialized values (get from vbios) to dpm tables context such as
> -        * gfxclk, memclk, dcefclk, and etc. And enable the DPM feature for each
> -        * type of clks.
> +        * For custom pptable uploading, skip the DPM features
> +        * disable process on Navi1x ASICs.
> +        *   - As the gfx related features are under control of
> +        *     RLC on those ASICs. RLC reinitialization will be
> +        *     needed to reenable them. That will cost much more
> +        *     efforts.
> +        *
> +        *   - SMU firmware can handle the DPM reenablement
> +        *     properly.
>          */
> -       if (initialize) {
> -               ret = smu_populate_smc_tables(smu);
> -               if (ret)
> -                       return ret;
> +       if (smu->uploading_custom_pp_table &&
> +           (adev->asic_type >= CHIP_NAVI10) &&
> +           (adev->asic_type <= CHIP_NAVI12))
> +               return 0;
>
> -               ret = smu_init_max_sustainable_clocks(smu);
> -               if (ret)
> +       /*
> +        * Disable all enabled SMU features.
> +        * This should be handled in SMU FW, as a backup
> +        * driver can issue call to SMU FW until sequence
> +        * in SMU FW is operational.
> +        */
> +       ret = smu_system_features_control(smu, false);
> +       if (ret) {
> +               pr_err("Failed to disable smu features.\n");
> +               return ret;
> +       }
> +
> +       /*
> +        * For baco, need to leave BACO feature enabled
> +        *
> +        * Correct the way for checking whether SMU_FEATURE_BACO_BIT
> +        * is supported.
> +        *
> +        * Since 'smu_feature_is_enabled(smu, SMU_FEATURE_BACO_BIT)' will
> +        * always return false as the 'smu_system_features_control(smu, false)'
> +        * was just issued above which disabled all SMU features.
> +        *
> +        * Thus 'smu_feature_get_index(smu, SMU_FEATURE_BACO_BIT)' is used
> +        * now for the checking.
> +        */
> +       if (use_baco && (smu_feature_get_index(smu, SMU_FEATURE_BACO_BIT) >= 0)) {
> +               ret = smu_feature_set_enabled(smu, SMU_FEATURE_BACO_BIT, true);
> +               if (ret) {
> +                       pr_warn("set BACO feature enabled failed, return %d\n", ret);
>                         return ret;
> +               }
>         }
>
> -       ret = smu_override_pcie_parameters(smu);
> -       if (ret)
> -               return ret;
> +       return ret;
> +}
>
> -       ret = smu_set_default_od_settings(smu);
> -       if (ret)
> -               return ret;
> +static int smu_internal_hw_cleanup(struct smu_context *smu)
> +{
> +       struct amdgpu_device *adev = smu->adev;
> +       int ret = 0;
>
> -       if (initialize) {
> -               ret = smu_populate_umd_state_clk(smu);
> -               if (ret)
> -                       return ret;
> +       smu_i2c_eeprom_fini(smu, &adev->pm.smu_i2c);
>
> -               ret = smu_get_power_limit(smu, &smu->default_power_limit, false, false);
> -               if (ret)
> -                       return ret;
> +       ret = smu_disable_thermal_alert(smu);
> +       if (ret) {
> +               pr_warn("Fail to stop thermal control!\n");
> +               return ret;
>         }
>
> -       /*
> -        * Set PMSTATUSLOG table bo address with SetToolsDramAddr MSG for tools.
> -        */
> -       ret = smu_set_tool_table_location(smu);
> -
> -       if (!smu_is_dpm_running(smu))
> -               pr_info("dpm has been disabled\n");
> +       ret = smu_disable_dpms(smu);
> +       if (ret)
> +               return ret;
>
> -       return ret;
> +       return 0;
>  }
>
>  static int smu_start_smc_engine(struct smu_context *smu)
> @@ -1257,10 +1336,20 @@ static int smu_start_smc_engine(struct smu_context *smu)
>
>         if (smu->ppt_funcs->check_fw_status) {
>                 ret = smu->ppt_funcs->check_fw_status(smu);
> -               if (ret)
> +               if (ret) {
>                         pr_err("SMC is not ready\n");
> +                       return ret;
> +               }
>         }
>
> +       /*
> +        * Send msg GetDriverIfVersion to check if the return value is equal
> +        * with DRIVER_IF_VERSION of smc header.
> +        */
> +       ret = smu_check_fw_version(smu);
> +       if (ret)
> +               return ret;
> +
>         return ret;
>  }
>
> @@ -1289,99 +1378,24 @@ static int smu_hw_init(void *handle)
>         if (!smu->pm_enabled)
>                 return 0;
>
> -       ret = smu_feature_init_dpm(smu);
> -       if (ret)
> -               goto failed;
> -
> -       ret = smu_smc_table_hw_init(smu, true);
> -       if (ret)
> -               goto failed;
> -
> -       /*
> -        * Use msg SetSystemVirtualDramAddr and DramLogSetDramAddr can notify
> -        * pool location.
> -        */
> -       ret = smu_notify_memory_pool_location(smu);
> +       /* get boot_values from vbios to set revision, gfxclk, and etc. */
> +       ret = smu_get_vbios_bootup_values(smu);
>         if (ret)
> -               goto failed;
> +               return ret;
>
> -       ret = smu_enable_thermal_alert(smu);
> +       ret = smu_setup_pptable(smu);
>         if (ret)
> -               goto failed;
> +               return ret;
>
> -       ret = smu_i2c_eeprom_init(smu, &adev->pm.smu_i2c);
> +       ret = smu_internal_hw_setup(smu);
>         if (ret)
> -               goto failed;
> +               return ret;
>
>         adev->pm.dpm_enabled = true;
>
>         pr_info("SMU is initialized successfully!\n");
>
>         return 0;
> -
> -failed:
> -       return ret;
> -}
> -
> -static int smu_disable_dpms(struct smu_context *smu)
> -{
> -       struct amdgpu_device *adev = smu->adev;
> -       int ret = 0;
> -       bool use_baco = !smu->is_apu &&
> -               ((adev->in_gpu_reset &&
> -                 (amdgpu_asic_reset_method(adev) == AMD_RESET_METHOD_BACO)) ||
> -                ((adev->in_runpm || adev->in_hibernate) && amdgpu_asic_supports_baco(adev)));
> -
> -       /*
> -        * For custom pptable uploading, skip the DPM features
> -        * disable process on Navi1x ASICs.
> -        *   - As the gfx related features are under control of
> -        *     RLC on those ASICs. RLC reinitialization will be
> -        *     needed to reenable them. That will cost much more
> -        *     efforts.
> -        *
> -        *   - SMU firmware can handle the DPM reenablement
> -        *     properly.
> -        */
> -       if (smu->uploading_custom_pp_table &&
> -           (adev->asic_type >= CHIP_NAVI10) &&
> -           (adev->asic_type <= CHIP_NAVI12))
> -               return 0;
> -
> -       /*
> -        * Disable all enabled SMU features.
> -        * This should be handled in SMU FW, as a backup
> -        * driver can issue call to SMU FW until sequence
> -        * in SMU FW is operational.
> -        */
> -       ret = smu_system_features_control(smu, false);
> -       if (ret) {
> -               pr_err("Failed to disable smu features.\n");
> -               return ret;
> -       }
> -
> -       /*
> -        * For baco, need to leave BACO feature enabled
> -        *
> -        * Correct the way for checking whether SMU_FEATURE_BACO_BIT
> -        * is supported.
> -        *
> -        * Since 'smu_feature_is_enabled(smu, SMU_FEATURE_BACO_BIT)' will
> -        * always return false as the 'smu_system_features_control(smu, false)'
> -        * was just issued above which disabled all SMU features.
> -        *
> -        * Thus 'smu_feature_get_index(smu, SMU_FEATURE_BACO_BIT)' is used
> -        * now for the checking.
> -        */
> -       if (use_baco && (smu_feature_get_index(smu, SMU_FEATURE_BACO_BIT) >= 0)) {
> -               ret = smu_feature_set_enabled(smu, SMU_FEATURE_BACO_BIT, true);
> -               if (ret) {
> -                       pr_warn("set BACO feature enabled failed, return %d\n", ret);
> -                       return ret;
> -               }
> -       }
> -
> -       return ret;
>  }
>
>  static int smu_hw_fini(void *handle)
> @@ -1404,19 +1418,9 @@ static int smu_hw_fini(void *handle)
>
>         adev->pm.dpm_enabled = false;
>
> -       smu_i2c_eeprom_fini(smu, &adev->pm.smu_i2c);
> -
> -       ret = smu_disable_thermal_alert(smu);
> -       if (ret) {
> -               pr_warn("Fail to stop thermal control!\n");
> -               return ret;
> -       }
> -
> -       ret = smu_disable_dpms(smu);
> -       if (ret) {
> -               pr_warn("Fail to stop Dpms!\n");
> +       ret = smu_internal_hw_cleanup(smu);
> +       if (ret)
>                 return ret;
> -       }
>
>         return 0;
>  }
> @@ -1434,6 +1438,8 @@ int smu_reset(struct smu_context *smu)
>         if (ret)
>                 return ret;
>
> +       ret = smu_late_init(adev);
> +
>         return ret;
>  }
>
> @@ -1451,15 +1457,7 @@ static int smu_suspend(void *handle)
>
>         adev->pm.dpm_enabled = false;
>
> -       smu_i2c_eeprom_fini(smu, &adev->pm.smu_i2c);
> -
> -       ret = smu_disable_thermal_alert(smu);
> -       if (ret) {
> -               pr_warn("Fail to stop thermal control!\n");
> -               return ret;
> -       }
> -
> -       ret = smu_disable_dpms(smu);
> +       ret = smu_internal_hw_cleanup(smu);
>         if (ret)
>                 return ret;
>
> @@ -1491,20 +1489,12 @@ static int smu_resume(void *handle)
>         ret = smu_start_smc_engine(smu);
>         if (ret) {
>                 pr_err("SMU is not ready yet!\n");
> -               goto failed;
> +               return ret;
>         }
>
> -       ret = smu_smc_table_hw_init(smu, false);
> -       if (ret)
> -               goto failed;
> -
> -       ret = smu_enable_thermal_alert(smu);
> -       if (ret)
> -               goto failed;
> -
> -       ret = smu_i2c_eeprom_init(smu, &adev->pm.smu_i2c);
> +       ret = smu_internal_hw_setup(smu);
>         if (ret)
> -               goto failed;
> +               return ret;
>
>         if (smu->is_apu)
>                 smu_set_gfx_cgpg(&adev->smu, true);
> @@ -1516,9 +1506,6 @@ static int smu_resume(void *handle)
>         pr_info("SMU is resumed successfully!\n");
>
>         return 0;
> -
> -failed:
> -       return ret;
>  }
>
>  int smu_display_configuration_change(struct smu_context *smu,
> --
> 2.26.2
>
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