On Tue, May 12, 2020 at 7:14 AM Evan Quan <evan.quan@xxxxxxx> wrote:
>
> There will be no further interrupt without proper ack
> for current one.
>
> Change-Id: Iad5adcaf7dd5c3a773b3d93ee0922a424dba8ac8
> Signed-off-by: Evan Quan <evan.quan@xxxxxxx>
> ---
> drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
> index 80d6c296a599..beec4ae0b1d6 100644
> --- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
> +++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
> @@ -1535,6 +1535,7 @@ static int smu_v11_0_irq_process(struct amdgpu_device *adev,
> */
> uint32_t ctxid = entry->src_data[0];
> struct smu_context *smu = &adev->smu;
> + uint32_t data;
>
> if (client_id == SOC15_IH_CLIENTID_THM) {
> switch (src_id) {
> @@ -1576,6 +1577,11 @@ static int smu_v11_0_irq_process(struct amdgpu_device *adev,
> orderly_poweroff(true);
> } else if (client_id == SOC15_IH_CLIENTID_MP1) {
> if (src_id == 0xfe) {
> + /* ACK SMUToHost interrupt */
> + data = RREG32_SOC15(MP1, 0, mmMP1_SMN_IH_SW_INT_CTRL);
> + data = REG_SET_FIELD(0, MP1_SMN_IH_SW_INT_CTRL, INT_ACK, 1);
Did you intend to clear the register here before setting the bit or
just set the ACK bit? With that clarified:
Reviewed-by: Alex Deucher <alexander.deucher@xxxxxxx>
> + WREG32_SOC15(MP1, 0, mmMP1_SMN_IH_SW_INT_CTRL, data);
> +
> switch (ctxid) {
> case 0x3:
> dev_dbg(adev->dev, "Switched to AC mode!\n");
> --
> 2.26.2
>
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