From: Hawking Zhang <Hawking.Zhang@xxxxxxx> IP discovery is only supported in Navi series and onwards. There is no need to reserve a portion of vram as discovery tmr region for pre-Navi adapters. Signed-off-by: Hawking Zhang <Hawking.Zhang@xxxxxxx> Reviewed-by: Likun Gao <Likun.Gao@xxxxxxx> Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx> --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c index 085d7c238163..93d057f92dcd 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -1961,14 +1961,16 @@ int amdgpu_ttm_init(struct amdgpu_device *adev) * reserve TMR memory at the top of VRAM which holds * IP Discovery data and is protected by PSP. */ - r = amdgpu_bo_create_kernel_at(adev, + if (adev->discovery_tmr_size > 0) { + r = amdgpu_bo_create_kernel_at(adev, adev->gmc.real_vram_size - adev->discovery_tmr_size, adev->discovery_tmr_size, AMDGPU_GEM_DOMAIN_VRAM, &adev->discovery_memory, NULL); - if (r) - return r; + if (r) + return r; + } DRM_INFO("amdgpu: %uM of VRAM memory ready\n", (unsigned) (adev->gmc.real_vram_size / (1024 * 1024))); -- 2.25.4 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx