On Tue, Apr 07, 2020 at 09:14:16PM +0800, Liang, Prike wrote:
> The system will be hang up during S3 suspend because of SMU is pending
> for GC not respose the register CP_HQD_ACTIVE access request.This issue
> root cause of accessing the GC register under enter GFX CGGPG and can
> be fixed by disable GFX CGPG before perform suspend.
>
> v2: Use disable the GFX CGPG instead of RLC safe mode guard.
>
> Signed-off-by: Prike Liang <Prike.Liang@xxxxxxx>
> Tested-by: Mengbing Wang <Mengbing.Wang@xxxxxxx>
Reviewed-by: Huang Rui <ray.huang@xxxxxxx>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 2e1f955..bf8735b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -2440,8 +2440,6 @@ static int amdgpu_device_ip_suspend_phase1(struct amdgpu_device *adev)
> {
> int i, r;
>
> - amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE);
> - amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE);
>
> for (i = adev->num_ip_blocks - 1; i >= 0; i--) {
> if (!adev->ip_blocks[i].status.valid)
> @@ -3470,6 +3468,9 @@ int amdgpu_device_suspend(struct drm_device *dev, bool fbcon)
> }
> }
>
> + amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE);
> + amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE);
> +
> amdgpu_amdkfd_suspend(adev, !fbcon);
>
> amdgpu_ras_suspend(adev);
> --
> 2.7.4
>
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