Re: [PATCH 3/5] drm/amdgpu/vcn: Add firmware share memory support

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On 2020-03-30 8:13 a.m., James Zhu wrote:
Added firmware share memory support for VCN. Current multiple
queue mode is enabled only.

Signed-off-by: James Zhu <James.Zhu@xxxxxxx>
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 13 +++++++++++++
  drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 24 ++++++++++++++++++++++++
  2 files changed, 37 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
index 7a0b074..328b6ce 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
@@ -182,6 +182,14 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
  				return r;
  			}
  		}
+
+		r = amdgpu_bo_create_kernel(adev, AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_fw_shared)),
+				PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM, &adev->vcn.inst[i].fw_shared_bo,
+				&adev->vcn.inst[i].fw_shared_gpu_addr, &adev->vcn.inst[i].fw_shared_cpu_addr);
+		if (r) {
+			dev_err(adev->dev, "VCN %d (%d) failed to allocate fimware shared bo\n", i, r);
+			return r;
+		}
  	}
return 0;
@@ -196,6 +204,11 @@ int amdgpu_vcn_sw_fini(struct amdgpu_device *adev)
  	for (j = 0; j < adev->vcn.num_vcn_inst; ++j) {
  		if (adev->vcn.harvest_config & (1 << j))
  			continue;
+
+		amdgpu_bo_free_kernel(&adev->vcn.inst[j].fw_shared_bo,
+					  &adev->vcn.inst[j].fw_shared_gpu_addr,
+					  (void **)&adev->vcn.inst[j].fw_shared_cpu_addr);
+
  		if (adev->vcn.indirect_sram) {
  			amdgpu_bo_free_kernel(&adev->vcn.inst[j].dpg_sram_bo,
  						  &adev->vcn.inst[j].dpg_sram_gpu_addr,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
index e913de8..853f0cc 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
@@ -179,11 +179,14 @@ struct amdgpu_vcn_inst {
  	struct amdgpu_irq_src	irq;
  	struct amdgpu_vcn_reg	external;
  	struct amdgpu_bo	*dpg_sram_bo;
+	struct amdgpu_bo	*fw_shared_bo;
  	struct dpg_pause_state	pause_state;
  	void			*dpg_sram_cpu_addr;
  	uint64_t		dpg_sram_gpu_addr;
  	uint32_t		*dpg_sram_curr_addr;
  	atomic_t		dpg_enc_submission_cnt;
+	void			*fw_shared_cpu_addr;
+	uint64_t		fw_shared_gpu_addr;
  };
struct amdgpu_vcn {
@@ -209,6 +212,27 @@ struct amdgpu_vcn {
  		int inst_idx, struct dpg_pause_state *new_state);
  };
+#define AMDGPU_VCN_MULTI_QUEUE_FLAG (1 << 8)
+
+enum fw_queue_mode {
+	fw_queue_ring_reset = 1,
+	fw_queue_dpg_hold_off = 2,
+};

Please move the define and enum to the top as others. With that fixed, the series are

Reviewed-by: Leo Liu <leo.liu@xxxxxxx>



+
+struct amdgpu_fw_shared_multi_queue {
+	uint8_t decode_queue_mode;
+	uint8_t encode_generalpurpose_queue_mode;
+	uint8_t encode_lowlatency_queue_mode;
+	uint8_t encode_realtime_queue_mode;
+	uint8_t padding[4];
+};
+
+struct amdgpu_fw_shared {
+	uint32_t present_flag_0;
+	uint8_t pad[53];
+	struct amdgpu_fw_shared_multi_queue multi_queue;
+} __attribute__((__packed__));
+
  int amdgpu_vcn_sw_init(struct amdgpu_device *adev);
  int amdgpu_vcn_sw_fini(struct amdgpu_device *adev);
  int amdgpu_vcn_suspend(struct amdgpu_device *adev);
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