We hit gmc page fault on navi1X. UMR tells that the physical address of pte is bad. Two issues: 1) we did not sync job schedule fence while update mapping. we sync resv, but the last fence is not there. So any wait on the resv finished before job completed. say, bo has been released while job running. 2) we might unref page table bo during update ptes, at the same time, there is job pending on bo. and submit a job in commit after free bo. We need free the bo after adding all fence to bo. xinhui pan (2): drm//amdgpu: Always sync fence before unlock eviction_lock drm/amdgpu: unref the bo after job submit drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 46 +++++++++++++++++++------- 1 file changed, 34 insertions(+), 12 deletions(-) -- 2.17.1 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx