RE: [PATCH] drm/amdgpu: update page retirement sequence

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[AMD Official Use Only - Internal Distribution Only]

 

In the original sequence, if the key bits are not set in the mca_status, the page retirement will not happen and the status register will be cleared.

If there is a UMC UE, that register will be cleared erroneously 31 times.

 

If MCA Status == 0 already from the beginning there is no reason to press forward with the rest of the checks and clear the register.

 

From: Zhang, Hawking <Hawking.Zhang@xxxxxxx>
Sent: Thursday, March 5, 2020 5:56 PM
To: Clements, John <John.Clements@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx; Li, Dennis <Dennis.Li@xxxxxxx>; Zhou1, Tao <Tao.Zhou1@xxxxxxx>; Chen, Guchun <Guchun.Chen@xxxxxxx>
Subject: RE: [PATCH] drm/amdgpu: update page retirement sequence

 

[AMD Official Use Only - Internal Distribution Only]

 

Hi John,

 

Can you please explain more on the differences between (a). exit immediately when mca_status is 0 and (b). exit when some of critical field in mca_status is 0?

 

Regards,
Hawking

From: Clements, John <John.Clements@xxxxxxx>
Sent: Thursday, March 5, 2020 17:40
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx; Zhang, Hawking <Hawking.Zhang@xxxxxxx>; Li, Dennis <Dennis.Li@xxxxxxx>; Zhou1, Tao <Tao.Zhou1@xxxxxxx>; Chen, Guchun <Guchun.Chen@xxxxxxx>
Subject: [PATCH] drm/amdgpu: update page retirement sequence

 

[AMD Official Use Only - Internal Distribution Only]

 

check UMC status and exit prior to making and erroneus register access

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