RE: [PATCH 1/6] drm/amdgpu: add xgmi ip headers

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[AMD Official Use Only - Internal Distribution Only]

It seems patch #6 is lost.

Patch #1 ~ patch #5 are:

Reviewed-by: Tao Zhou <tao.zhou1@xxxxxxx>

> -----Original Message-----
> From: Hawking Zhang <Hawking.Zhang@xxxxxxx>
> Sent: 2020年3月4日 18:52
> To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx; Chen, Guchun
> <Guchun.Chen@xxxxxxx>; Zhou1, Tao <Tao.Zhou1@xxxxxxx>; Clements,
> John <John.Clements@xxxxxxx>; Li, Dennis <Dennis.Li@xxxxxxx>;
> Deucher, Alexander <Alexander.Deucher@xxxxxxx>
> Cc: Zhang, Hawking <Hawking.Zhang@xxxxxxx>
> Subject: [PATCH 1/6] drm/amdgpu: add xgmi ip headers
> 
> add xgmi ip smn address and shift mask header files
> 
> Signed-off-by: Hawking Zhang <Hawking.Zhang@xxxxxxx>
> Reviewed-by: Guchun Chen <guchun.chen@xxxxxxx>
> ---
>  .../asic_reg/xgmi/xgmi_4_0_0_sh_mask.h        | 69 +++++++++++++++++++
>  .../include/asic_reg/xgmi/xgmi_4_0_0_smn.h    | 29 ++++++++
>  2 files changed, 98 insertions(+)
>  create mode 100644
> drivers/gpu/drm/amd/include/asic_reg/xgmi/xgmi_4_0_0_sh_mask.h
>  create mode 100644
> drivers/gpu/drm/amd/include/asic_reg/xgmi/xgmi_4_0_0_smn.h
> 
> diff --git
> a/drivers/gpu/drm/amd/include/asic_reg/xgmi/xgmi_4_0_0_sh_mask.h
> b/drivers/gpu/drm/amd/include/asic_reg/xgmi/xgmi_4_0_0_sh_mask.h
> new file mode 100644
> index 000000000000..f37712f05b03
> --- /dev/null
> +++ b/drivers/gpu/drm/amd/include/asic_reg/xgmi/xgmi_4_0_0_sh_mask.h
> @@ -0,0 +1,69 @@
> +/*
> + * Copyright 2020 Advanced Micro Devices, Inc.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
> MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO
> EVENT SHALL
> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM,
> DAMAGES OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
> OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR
> THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + *
> + */
> +
> +#ifndef _xgmi_4_0_0_SH_MASK_HEADER
> +#define _xgmi_4_0_0_SH_MASK_HEADER
> +
> +//PCS_GOPX16_PCS_ERROR_STATUS
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__DataLossErr__SHIFT
> 								0x0
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__TrainingErr__SHIFT
> 								0x1
> +#define	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__CRCErr__SHIFT
> 								0x5
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__BERExceededErr__SHIFT
> 							0x6
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__TxMetaDataErr__SHIFT
> 								0x7
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__ReplayBufParityErr__SHI
> FT							0x8
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__DataParityErr__SHIFT
> 								0x9
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__ReplayFifoOverflowErr_
> _SHIFT							0xa
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__ReplayFifoUnderflowErr
> __SHIFT						0xb
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__ElasticFifoOverflowErr__
> SHIFT						0xc
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__DeskewErr__SHIFT
> 								0xd
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__DataStartupLimitErr__S
> HIFT							0xf
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__FCInitTimeoutErr__SHIF
> T							0x10
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__RecoveryTimeoutErr__S
> HIFT							0x11
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__ReadySerialTimeoutErr_
> _SHIFT							0x12
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__ReadySerialAttemptErr_
> _SHIFT							0x13
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__RecoveryAttemptErr__S
> HIFT							0x14
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__RecoveryRelockAttempt
> Err__SHIFT						0x15
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__ClearBERAccum__SHIFT
> 								0x17
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__BERAccumulator__SHIFT
> 							0x18
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__DataLossErr_MASK
> 								0x00000001L
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__TrainingErr_MASK
> 							0x00000002L
> +#define	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__CRCErr_MASK
> 
> 	0x00000020L
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__BERExceededErr_MASK
> 								0x00000040L
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__TxMetaDataErr_MASK
> 								0x00000080L
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__ReplayBufParityErr_MAS
> K							0x00000100L
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__DataParityErr_MASK
> 								0x00000200L
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__ReplayFifoOverflowErr_
> MASK							0x00000400L
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__ReplayFifoUnderflowErr
> _MASK							0x00000800L
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__ElasticFifoOverflowErr_
> MASK							0x00001000L
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__DeskewErr_MASK
> 							0x00002000L
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__DataStartupLimitErr_MA
> SK							0x00008000L
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__FCInitTimeoutErr_MASK
> 							0x00010000L
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__RecoveryTimeoutErr_M
> ASK							0x00020000L
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__ReadySerialTimeoutErr_
> MASK							0x00040000L
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__ReadySerialAttemptErr_
> MASK							0x00080000L
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__RecoveryAttemptErr_M
> ASK							0x00100000L
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__RecoveryRelockAttempt
> Err_MASK						0x00200000L
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__ClearBERAccum_MASK
> 								0x00800000L
> +#define
> 	XGMI0_PCS_GOPX16_PCS_ERROR_STATUS__BERAccumulator_MASK
> 								0xFF000000L
> +
> +#endif
> diff --git a/drivers/gpu/drm/amd/include/asic_reg/xgmi/xgmi_4_0_0_smn.h
> b/drivers/gpu/drm/amd/include/asic_reg/xgmi/xgmi_4_0_0_smn.h
> new file mode 100644
> index 000000000000..6ccbac4ce87e
> --- /dev/null
> +++ b/drivers/gpu/drm/amd/include/asic_reg/xgmi/xgmi_4_0_0_smn.h
> @@ -0,0 +1,29 @@
> +/*
> + * Copyright 2020 Advanced Micro Devices, Inc.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
> MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO
> EVENT SHALL
> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM,
> DAMAGES OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
> OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR
> THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + *
> + */
> +
> +#ifndef _xgmi_4_0_0_SMN_HEADER
> +#define _xgmi_4_0_0_SMN_HEADER
> +
> +#define	smnXGMI0_PCS_GOPX16_PCS_ERROR_STATUS
> 		0x11af0210
> +
> +#endif
> --
> 2.17.1
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