otherwise we'll out-of-bound when accessing op_37_dst_sel[8] Signed-off-by: Xiaojie Yuan <xiaojie.yuan@xxxxxxx> --- src/lib/ring_decode.c | 2 +- src/lib/umr_pm4_decode_opcodes.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/lib/ring_decode.c b/src/lib/ring_decode.c index c5582f5..f26cf0d 100644 --- a/src/lib/ring_decode.c +++ b/src/lib/ring_decode.c @@ -465,7 +465,7 @@ static void print_decode_pm4_pkt3(struct umr_asic *asic, struct umr_ring_decoder { static const char *op_3c_functions[] = { "true", "<", "<=", "==", "!=", ">=", ">", "reserved" }; static const char *op_37_engines[] = { "ME", "PFP", "CE", "DE" }; - static const char *op_37_dst_sel[] = { "mem-mapped reg", "memory sync", "TC/L2", "GDS", "reserved", "memory async", "reserved", "reserved" }; + static const char *op_37_dst_sel[] = { "mem-mapped reg", "memory sync", "TC/L2", "GDS", "reserved", "memory async", "reserved", "reserved", "preemption meta memory" }; static const char *op_40_mem_sel[] = { "mem-mapped reg", "memory" "tc_l2", "gds", "perfcounters", "immediate data", "atomic return data", "gds_atomic_return_data_0", "gds_atomic_return_data1", "gpu_clock_count", "system_clock_count" }; static const char *op_84_cntr_sel[] = { "invalid", "ce", "cs", "ce and cs" }; static const char *op_7a_index_str[] = { "default", "prim_type", "index_type", "num_instance", "multi_vgt_param", "reserved", "reserved", "reserved" }; diff --git a/src/lib/umr_pm4_decode_opcodes.c b/src/lib/umr_pm4_decode_opcodes.c index a823ecf..c4ad5ce 100644 --- a/src/lib/umr_pm4_decode_opcodes.c +++ b/src/lib/umr_pm4_decode_opcodes.c @@ -351,7 +351,7 @@ static void decode_pkt3(struct umr_asic *asic, struct umr_pm4_stream_decode_ui * { static char *op_3c_functions[] = { "true", "<", "<=", "==", "!=", ">=", ">", "reserved" }; static char *op_37_engines[] = { "ME", "PFP", "CE", "DE" }; - static char *op_37_dst_sel[] = { "mem-mapped reg", "memory sync", "TC/L2", "GDS", "reserved", "memory async", "reserved", "reserved" }; + static char *op_37_dst_sel[] = { "mem-mapped reg", "memory sync", "TC/L2", "GDS", "reserved", "memory async", "reserved", "reserved", "preemption meta memory" }; static char *op_40_mem_sel[] = { "mem-mapped reg", "memory" "tc_l2", "gds", "perfcounters", "immediate data", "atomic return data", "gds_atomic_return_data_0", "gds_atomic_return_data1", "gpu_clock_count", "system_clock_count" }; static char *op_84_cntr_sel[] = { "invalid", "ce", "cs", "ce and cs" }; static char *op_7a_index_str[] = { "default", "prim_type", "index_type", "num_instance", "multi_vgt_param", "reserved", "reserved", "reserved" }; -- 2.20.1 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx