RE: [PATCH] drm/amdgpu/soc15: fix xclk for raven

["Quan, Evan" <Evan.Quan@xxxxxxx>]

Acked-by: Evan Quan <evan.quan@xxxxxxx>

> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Alex
> Deucher
> Sent: Wednesday, February 12, 2020 2:51 PM
> To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Deucher, Alexander <Alexander.Deucher@xxxxxxx>
> Subject: [PATCH] drm/amdgpu/soc15: fix xclk for raven
> 
> It's 25 Mhz (refclk / 4).  This fixes the interpretation
> of the rlc clock counter.
> 
> Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
> ---
>  drivers/gpu/drm/amd/amdgpu/soc15.c | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c
> b/drivers/gpu/drm/amd/amdgpu/soc15.c
> index 15f3424a1ff7..2b488dfb2f21 100644
> --- a/drivers/gpu/drm/amd/amdgpu/soc15.c
> +++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
> @@ -272,7 +272,12 @@ static u32 soc15_get_config_memsize(struct
> amdgpu_device *adev)
> 
>  static u32 soc15_get_xclk(struct amdgpu_device *adev)
>  {
> -	return adev->clock.spll.reference_freq;
> +	u32 reference_clock = adev->clock.spll.reference_freq;
> +
> +	if (adev->asic_type == CHIP_RAVEN)
> +		return reference_clock / 4;
> +
> +	return reference_clock;
>  }
> 
> 
> --
> 2.24.1
> 
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