Series is:
Reviewed-by: Alex Deucher <alexander.deucher@xxxxxxx>
On Wed, Feb 5, 2020 at 10:22 AM Christian König
<ckoenig.leichtzumerken@xxxxxxxxx> wrote:
>
> Make use of the better performance here as well.
>
> This patch is only compile tested!
>
> Signed-off-by: Christian König <christian.koenig@xxxxxxx>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 38 +++++++++++++++----------
> 1 file changed, 23 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 58d143b24ba0..538c3b52b712 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -1565,7 +1565,7 @@ static int amdgpu_ttm_access_memory(struct ttm_buffer_object *bo,
>
> while (len && pos < adev->gmc.mc_vram_size) {
> uint64_t aligned_pos = pos & ~(uint64_t)3;
> - uint32_t bytes = 4 - (pos & 3);
> + uint64_t bytes = 4 - (pos & 3);
> uint32_t shift = (pos & 3) * 8;
> uint32_t mask = 0xffffffff << shift;
>
> @@ -1574,20 +1574,28 @@ static int amdgpu_ttm_access_memory(struct ttm_buffer_object *bo,
> bytes = len;
> }
>
> - spin_lock_irqsave(&adev->mmio_idx_lock, flags);
> - WREG32_NO_KIQ(mmMM_INDEX, ((uint32_t)aligned_pos) | 0x80000000);
> - WREG32_NO_KIQ(mmMM_INDEX_HI, aligned_pos >> 31);
> - if (!write || mask != 0xffffffff)
> - value = RREG32_NO_KIQ(mmMM_DATA);
> - if (write) {
> - value &= ~mask;
> - value |= (*(uint32_t *)buf << shift) & mask;
> - WREG32_NO_KIQ(mmMM_DATA, value);
> - }
> - spin_unlock_irqrestore(&adev->mmio_idx_lock, flags);
> - if (!write) {
> - value = (value & mask) >> shift;
> - memcpy(buf, &value, bytes);
> + if (mask != 0xffffffff) {
> + spin_lock_irqsave(&adev->mmio_idx_lock, flags);
> + WREG32_NO_KIQ(mmMM_INDEX, ((uint32_t)aligned_pos) | 0x80000000);
> + WREG32_NO_KIQ(mmMM_INDEX_HI, aligned_pos >> 31);
> + if (!write || mask != 0xffffffff)
> + value = RREG32_NO_KIQ(mmMM_DATA);
> + if (write) {
> + value &= ~mask;
> + value |= (*(uint32_t *)buf << shift) & mask;
> + WREG32_NO_KIQ(mmMM_DATA, value);
> + }
> + spin_unlock_irqrestore(&adev->mmio_idx_lock, flags);
> + if (!write) {
> + value = (value & mask) >> shift;
> + memcpy(buf, &value, bytes);
> + }
> + } else {
> + bytes = (nodes->start + nodes->size) << PAGE_SHIFT;
> + bytes = min(pos - bytes, (uint64_t)len & ~0x3ull);
> +
> + amdgpu_device_vram_access(adev, pos, (uint32_t *)buf,
> + bytes, write);
> }
>
> ret += bytes;
> --
> 2.17.1
>
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