[PATCH 00/43] DC Patches - January 10, 2020

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This DC patchset brings improvements in multiple areas. In summary, we
highlight:

* Add OCSC improvements.
* Bug fix on chroma, Freesync dml, and DMUB.
* DMCUB improvements.
* Some code refactor.

Alvin Lee (3):
  drm/amd/display: Fix 300Hz Freesync bug
  drm/amd/display: Don't always set pstate true if dummy latency = 0
  drm/amd/display: Enable double buffer for OTG_BLANK

Amanda Liu (1):
  drm/amd/display: Clear state after exiting fixed active VRR state

Anthony Koo (1):
  drm/amd/display: make PSR static screen entry within 30 ms

Aric Cyr (4):
  drm/amd/display: 3.2.65
  drm/amd/display: 3.2.66
  drm/amd/display: 3.2.67
  drm/amd/display: 3.2.68

Charlene Liu (1):
  drm/amd/display: rename _lvp to l_vp

Chris Park (1):
  drm/amd/display: Add default switch case for DCC

Dmytro Laktyushkin (1):
  drm/amd/display: expand dml structs

Eric Yang (1):
  drm/amd/display: fix chroma vp wa corner case

George Shen (1):
  drm/amd/display: Add w/a to reset PHY before link training in
    verify_link_cap

Joseph Gravenor (1):
  drm/amd/display: stop doing unnecessary detection when going to D3

Josip Pavic (1):
  drm/amd/display: implement fw-driver interface for abm 2.4

Jun Lei (1):
  drm/amd/display: fixup DML dependencies

Lewis Huang (2):
  drm/amd/display: remove psr state condition when psr exit case
  drm/amd/display: Add monitor patch for AUO dpcd issue

Martin Leung (1):
  drm/amd/display: Adding forgotten hubbub func

Martin Tsai (1):
  drm/amd/display: Use udelay to avoid context switch

Michael Strauss (1):
  drm/amd/display: Update HDMI hang w/a to apply to all TMDS signals

Nicholas Kazlauskas (3):
  drm/amd/display: Flush framebuffer data before passing to DMCUB
  drm/amd/display: Read inst_fb data back during DMUB loading
  drm/amd/display: Soft reset DMUIF during DMUB reset

Nikola Cornij (1):
  drm/amd/display: Disable secondary link for certain monitors

Noah Abradjian (4):
  drm/amd/display: Add double buffering to dcn20 OCSC
  drm/amd/display: Fix double buffering in dcn2 ICSC
  drm/amd/display: Double buffer dcn2 Gamut Remap
  drm/amd/display: Indirect reg read macro with shift and mask

Paul Hsieh (1):
  drm/amd/display: reallocate MST payload when link loss

Rodrigo Siqueira (1):
  drm/amd/include: Add OCSC registers

Sung Lee (1):
  drm/amd/display: Use SMU ClockTable Values for DML Calculations

Wenjing Liu (3):
  drm/amd/display: wait for update when setting dpg test pattern
  drm/amd/display: wait for test pattern after when all pipes are
    programmed
  drm/amd/display: skip opp blank or unblank if test pattern enabled

Wyatt Wood (3):
  drm/amd/display: Driverside changes to support PSR in DMCUB
  drm/amd/display: DMCUB FW Changes to support PSR
  drm/amd/display: Fix DMUB PSR command IDs

Yongqiang Sun (3):
  drm/amd/display: programing surface flip by dmcub.
  drm/amd/display: Refactor surface flip programming
  drm/amd/display: Only program surface flip for video plane via dmcub

abdoulaye berthe (1):
  drm/amd/display: store lttpr mode with dpcd

 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  32 +-
 .../amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c |  10 +-
 drivers/gpu/drm/amd/display/dc/core/dc.c      |  13 +-
 drivers/gpu/drm/amd/display/dc/core/dc_link.c |  64 +++-
 .../gpu/drm/amd/display/dc/core/dc_link_dp.c  |  99 +++++-
 .../gpu/drm/amd/display/dc/core/dc_resource.c |  10 +-
 drivers/gpu/drm/amd/display/dc/dc.h           |  20 +-
 drivers/gpu/drm/amd/display/dc/dc_helper.c    |  30 ++
 drivers/gpu/drm/amd/display/dc/dc_link.h      |   4 +
 drivers/gpu/drm/amd/display/dc/dc_stream.h    |   4 +-
 drivers/gpu/drm/amd/display/dc/dc_types.h     |   3 +-
 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c |   3 -
 drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c | 220 +++++++++++++
 drivers/gpu/drm/amd/display/dc/dce/dmub_psr.h |  47 +++
 .../display/dc/dce110/dce110_hw_sequencer.c   |  35 +-
 .../dc/dce110/dce110_timing_generator.c       |  11 +-
 .../dc/dce110/dce110_timing_generator.h       |   3 +-
 .../dc/dce120/dce120_timing_generator.c       |  11 +-
 .../drm/amd/display/dc/dcn10/dcn10_dpp_cm.c   |  20 --
 .../drm/amd/display/dc/dcn10/dcn10_hubbub.c   |   3 +
 .../amd/display/dc/dcn10/dcn10_hw_sequencer.c |  31 +-
 .../amd/display/dc/dcn10/dcn10_hw_sequencer.h |   2 +-
 .../gpu/drm/amd/display/dc/dcn10/dcn10_optc.c |  15 +-
 .../gpu/drm/amd/display/dc/dcn10/dcn10_optc.h |   3 +-
 .../gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c  |  26 +-
 .../gpu/drm/amd/display/dc/dcn20/dcn20_dpp.h  |  64 +++-
 .../drm/amd/display/dc/dcn20/dcn20_dpp_cm.c   | 155 ++++++++-
 .../drm/amd/display/dc/dcn20/dcn20_hubbub.c   |   6 +-
 .../drm/amd/display/dc/dcn20/dcn20_hwseq.c    |  13 +-
 .../gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c  |  47 ++-
 .../gpu/drm/amd/display/dc/dcn20/dcn20_mpc.h  |  22 ++
 .../drm/amd/display/dc/dcn20/dcn20_resource.c |  53 +++-
 .../gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c | 300 ++++++++++--------
 .../drm/amd/display/dc/dcn21/dcn21_resource.c |  28 +-
 .../dc/dml/dcn20/display_mode_vba_20.c        | 169 +++++-----
 .../dc/dml/dcn20/display_mode_vba_20v2.c      | 171 +++++-----
 .../dc/dml/dcn21/display_mode_vba_21.c        | 161 +++++-----
 .../amd/display/dc/dml/display_mode_enums.h   |  18 +-
 .../amd/display/dc/dml/display_mode_structs.h |   7 +-
 .../drm/amd/display/dc/dml/display_mode_vba.c |  22 +-
 .../drm/amd/display/dc/dml/display_mode_vba.h | 128 +++++---
 .../drm/amd/display/dc/dml/dml_common_defs.c  |   2 +-
 .../drm/amd/display/dc/dml/dml_inline_defs.h  |   2 +-
 .../gpu/drm/amd/display/dc/inc/core_types.h   |   1 +
 .../gpu/drm/amd/display/dc/inc/dc_link_dp.h   |   2 +
 .../display/dc/{calcs => inc}/dcn_calc_math.h |   0
 drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h   |  20 ++
 drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h  |  20 ++
 .../amd/display/dc/inc/hw/timing_generator.h  |   3 +-
 .../gpu/drm/amd/display/dc/inc/hw_sequencer.h |   4 +-
 .../amd/display/dc/inc/hw_sequencer_private.h |   2 +-
 .../gpu/drm/amd/display/dc/inc/reg_helper.h   |  13 +
 .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h   |  78 +++--
 .../drm/amd/display/dmub/inc/dmub_cmd_dal.h   |  15 +-
 .../gpu/drm/amd/display/dmub/inc/dmub_rb.h    |  29 +-
 .../gpu/drm/amd/display/dmub/inc/dmub_srv.h   |  19 --
 .../gpu/drm/amd/display/dmub/src/dmub_dcn20.c |   2 +
 .../gpu/drm/amd/display/dmub/src/dmub_dcn20.h |   6 +-
 .../gpu/drm/amd/display/dmub/src/dmub_srv.c   |  57 ++--
 .../amd/display/modules/freesync/freesync.c   |   3 +
 .../amd/display/modules/power/power_helpers.c |   7 +-
 .../include/asic_reg/dcn/dcn_2_0_0_offset.h   |   4 +
 .../include/asic_reg/dcn/dcn_2_0_0_sh_mask.h  |   9 +-
 .../include/asic_reg/dcn/dcn_2_1_0_offset.h   |   5 +-
 .../include/asic_reg/dcn/dcn_2_1_0_sh_mask.h  |   8 +
 65 files changed, 1743 insertions(+), 651 deletions(-)
 create mode 100644 drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/dce/dmub_psr.h
 rename drivers/gpu/drm/amd/display/dc/{calcs => inc}/dcn_calc_math.h (100%)

-- 
2.24.1

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