Am 19.12.19 um 13:01 schrieb Nirmoy:
Reviewed-by: Nirmoy Das <nirmoy.das@xxxxxxx>
On 12/19/19 12:42 PM, Le Ma wrote:
This workaround does not affect other asics because amdgpu only need
expose
one gfx sched to user for now.
Change-Id: Ica92b8565a89899aebe0eba7b2b5a25159b411d3
Signed-off-by: Le Ma <le.ma@xxxxxxx>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index 63f6365..64e2bab 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -127,7 +127,8 @@ static int amdgpu_ctx_init(struct amdgpu_device
*adev,
switch (i) {
case AMDGPU_HW_IP_GFX:
- scheds = adev->gfx.gfx_sched;
+ sched = &adev->gfx.gfx_ring[0].sched;
+ scheds = &sched;
num_scheds = 1;
Mhm, we should probably rather fix this here and don't expose a GFX ring
when the hardware doesn't have one.
Christian.
break;
case AMDGPU_HW_IP_COMPUTE:
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