On Tue, Dec 17, 2019 at 10:57:11AM -0500, Harry Wentland wrote: > On 2019-12-11 2:33 a.m., Louis Li wrote: > > [Why] > > External monitor cannot be displayed consistently, if connecting > > via this Apple dongle (A1621, USB Type-C to HDMI). > > Experiments prove that the dongle needs 200ms at least to be ready > > for communication, after it drives HPDsignal high, and DPCD cannot > > be read correctly during the period, even reading it repeatedly. > > In such a case, driver does not perform link training bcz of no DPCD. > > > > [How] > > When driver is run to the modified point, EDID is read correctly > > and dpcd_sink_count of link is not zero. Therefore, link training > > should be successfully performed. Which implies parameters should > > be updated, e.g. lane count, link rate, etc. Checking parameters, > > if values of those parameters are zero, link training is not > > performed. So, do link-training to have detection completed. > > > > With this patch applied, the problem cannot be reproduced. > > Testing other dongles, results are PASS. > > Patch(v3) is verified PASS by both AMD internal lab and customer. > > > > > > Signed-off-by: Louis Li <Ching-shih.Li@xxxxxxx> > > --- > > drivers/gpu/drm/amd/display/dc/core/dc_link.c | 4 +++- > > 1 file changed, 3 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c > > index 7372dedd2f48..6188edc92d0f 100644 > > --- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c > > +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c > > @@ -725,7 +725,9 @@ bool dc_link_detect(struct dc_link *link, enum dc_detect_reason reason) > > > > if (link->connector_signal == SIGNAL_TYPE_DISPLAY_PORT && > > sink_caps.transaction_type == DDC_TRANSACTION_TYPE_I2C_OVER_AUX && > > - reason != DETECT_REASON_HPDRX) { > > Do we need to drop this line? This looks like it'll break the previous > fix here. > > It looks like Abdoulaye added this here to fix the 400.1.1 DP compliance > test. If you can check with him that your solution is fine and make sure > to test that you can get a consistent pass of 400.1.1 over 30 runs I'm > okay to take the change. > > Harry > Yes, need drop this line for this fix. Good to know it may impact 400.1.1. I will verify it with this patch. And update test result. Louis > > + link->verified_link_cap.lane_count == 0 && > > + link->verified_link_cap.link_rate == 0 && > > + link->verified_link_cap.link_spread == 0) { > > /* > > * TODO debug why Dell 2413 doesn't like > > * two link trainings > > _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx