On Thu, Dec 5, 2019 at 10:36 PM Evan Quan <evan.quan@xxxxxxx> wrote:
>
> This is needed for coming asic init on performing gpu reset.
>
> Change-Id: If3671a24d239e3d288665fadaa2c40c87d5da40b
> Signed-off-by: Evan Quan <evan.quan@xxxxxxx>
> ---
> drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
> index 39ec06aee809..ab809df7bc35 100644
> --- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
> +++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
> @@ -1659,6 +1659,12 @@ int smu_v11_0_baco_set_state(struct smu_context *smu, enum smu_baco_state state)
> }
> } else {
> ret = smu_send_smc_msg(smu, SMU_MSG_ExitBaco);
> + if (ret)
> + goto out;
> +
> + WREG32_SOC15(NBIO, 0, mmBIOS_SCRATCH_6, 0);
> + WREG32_SOC15(NBIO, 0, mmBIOS_SCRATCH_7, 0);
Please use:
WREG32(adev->bios_scratch_reg_offset + 6, 0);
WREG32(adev->bios_scratch_reg_offset + 7, 0);
So we don't have to worry about asic specific scratch register offsets.
> +
> bif_doorbell_intr_cntl = REG_SET_FIELD(bif_doorbell_intr_cntl,
> BIF_DOORBELL_INT_CNTL,
> DOORBELL_INTERRUPT_DISABLE, 0);
> --
> 2.24.0
>
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