> -----Original Message----- > From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Likun > Gao > Sent: Monday, December 2, 2019 6:04 PM > To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx > Cc: Gao, Likun <Likun.Gao@xxxxxxx>; Wang, Kevin(Yang) > <Kevin1.Wang@xxxxxxx>; Feng, Kenneth <Kenneth.Feng@xxxxxxx> > Subject: [PATCH] drm/amdgpu/powerplay: unify smu send message function > > From: Likun Gao <Likun.Gao@xxxxxxx> > > Drop smu_send_smc_msg function from ASIC specify structure. > Reuse smu_send_smc_msg_with_param function for smu_send_smc_msg. > Set paramer to 0 for smu_send_msg function, otherwise it will send > with previous paramer value (Not a certain value). > > Signed-off-by: Likun Gao <Likun.Gao@xxxxxxx> > --- > drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 8 ++++++++ > drivers/gpu/drm/amd/powerplay/arcturus_ppt.c | 1 - > drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h | 3 ++- > drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h | 2 -- > drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h | 2 -- > drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 1 - > drivers/gpu/drm/amd/powerplay/renoir_ppt.c | 1 - > drivers/gpu/drm/amd/powerplay/smu_internal.h | 2 -- > drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 26 -------------------------- > drivers/gpu/drm/amd/powerplay/smu_v12_0.c | 25 ------------------------- > drivers/gpu/drm/amd/powerplay/vega20_ppt.c | 1 - > 11 files changed, 10 insertions(+), 62 deletions(-) > > diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c > b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c > index 36001a4..e039904 100644 > --- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c > +++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c > @@ -2567,3 +2567,11 @@ uint32_t smu_get_pptable_power_limit(struct > smu_context *smu) > > return ret; > } > + > +int smu_send_smc_msg(struct smu_context *smu, uint16_t msg) > +{ > + int ret; > + > + ret = smu->ppt_funcs->send_smc_msg_with_param(smu, msg, 0); > + return ret; > +} [Quan, Evan] Better to still keep the smu_send_smc_msg definition in smu_internal.h as it's used internally. Other than this, the patch is reviewed-by: Evan Quan <evan.quan@xxxxxxx> > diff --git a/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c > b/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c > index 68107de..3f13986 100644 > --- a/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c > +++ b/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c > @@ -2137,7 +2137,6 @@ static const struct pptable_funcs arcturus_ppt_funcs > = { > .set_tool_table_location = smu_v11_0_set_tool_table_location, > .notify_memory_pool_location = > smu_v11_0_notify_memory_pool_location, > .system_features_control = smu_v11_0_system_features_control, > - .send_smc_msg = smu_v11_0_send_msg, > .send_smc_msg_with_param = smu_v11_0_send_msg_with_param, > .read_smc_arg = smu_v11_0_read_arg, > .init_display_count = smu_v11_0_init_display_count, > diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h > b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h > index ada4a8d..fae1026 100644 > --- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h > +++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h > @@ -500,7 +500,6 @@ struct pptable_funcs { > int (*notify_memory_pool_location)(struct smu_context *smu); > int (*set_last_dcef_min_deep_sleep_clk)(struct smu_context *smu); > int (*system_features_control)(struct smu_context *smu, bool en); > - int (*send_smc_msg)(struct smu_context *smu, uint16_t msg); > int (*send_smc_msg_with_param)(struct smu_context *smu, uint16_t > msg, uint32_t param); > int (*read_smc_arg)(struct smu_context *smu, uint32_t *arg); > int (*init_display_count)(struct smu_context *smu, uint32_t count); > @@ -725,4 +724,6 @@ int smu_get_dpm_clock_table(struct smu_context > *smu, > > uint32_t smu_get_pptable_power_limit(struct smu_context *smu); > > +int smu_send_smc_msg(struct smu_context *smu, uint16_t msg); > + > #endif > diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h > b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h > index 5a27713..80b1d20 100644 > --- a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h > +++ b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h > @@ -177,8 +177,6 @@ int smu_v11_0_notify_memory_pool_location(struct > smu_context *smu); > int smu_v11_0_system_features_control(struct smu_context *smu, > bool en); > > -int smu_v11_0_send_msg(struct smu_context *smu, uint16_t msg); > - > int > smu_v11_0_send_msg_with_param(struct smu_context *smu, uint16_t msg, > uint32_t param); > diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h > b/drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h > index 44c65dd..f709f6e 100644 > --- a/drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h > +++ b/drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h > @@ -44,8 +44,6 @@ int smu_v12_0_read_arg(struct smu_context *smu, > uint32_t *arg); > > int smu_v12_0_wait_for_response(struct smu_context *smu); > > -int smu_v12_0_send_msg(struct smu_context *smu, uint16_t msg); > - > int > smu_v12_0_send_msg_with_param(struct smu_context *smu, uint16_t msg, > uint32_t param); > diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c > b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c > index f842246..15403b7 100644 > --- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c > +++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c > @@ -2083,7 +2083,6 @@ static const struct pptable_funcs navi10_ppt_funcs = > { > .set_tool_table_location = smu_v11_0_set_tool_table_location, > .notify_memory_pool_location = > smu_v11_0_notify_memory_pool_location, > .system_features_control = smu_v11_0_system_features_control, > - .send_smc_msg = smu_v11_0_send_msg, > .send_smc_msg_with_param = smu_v11_0_send_msg_with_param, > .read_smc_arg = smu_v11_0_read_arg, > .init_display_count = smu_v11_0_init_display_count, > diff --git a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c > b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c > index b44ce14..b076589 100644 > --- a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c > +++ b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c > @@ -800,7 +800,6 @@ static const struct pptable_funcs renoir_ppt_funcs = { > .powergate_sdma = smu_v12_0_powergate_sdma, > .powergate_vcn = smu_v12_0_powergate_vcn, > .powergate_jpeg = smu_v12_0_powergate_jpeg, > - .send_smc_msg = smu_v12_0_send_msg, > .send_smc_msg_with_param = smu_v12_0_send_msg_with_param, > .read_smc_arg = smu_v12_0_read_arg, > .set_gfx_cgpg = smu_v12_0_set_gfx_cgpg, > diff --git a/drivers/gpu/drm/amd/powerplay/smu_internal.h > b/drivers/gpu/drm/amd/powerplay/smu_internal.h > index b2d81d3..dd3642d 100644 > --- a/drivers/gpu/drm/amd/powerplay/smu_internal.h > +++ b/drivers/gpu/drm/amd/powerplay/smu_internal.h > @@ -77,8 +77,6 @@ > #define smu_set_default_od_settings(smu, initialize) \ > ((smu)->ppt_funcs->set_default_od_settings ? (smu)->ppt_funcs- > >set_default_od_settings((smu), (initialize)) : 0) > > -#define smu_send_smc_msg(smu, msg) \ > - ((smu)->ppt_funcs->send_smc_msg? (smu)->ppt_funcs- > >send_smc_msg((smu), (msg)) : 0) > #define smu_send_smc_msg_with_param(smu, msg, param) \ > ((smu)->ppt_funcs->send_smc_msg_with_param? (smu)->ppt_funcs- > >send_smc_msg_with_param((smu), (msg), (param)) : 0) > #define smu_read_smc_arg(smu, arg) \ > diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c > b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c > index b90eb81..acdbb8d 100644 > --- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c > +++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c > @@ -91,36 +91,10 @@ static int smu_v11_0_wait_for_response(struct > smu_context *smu) > return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90) == 0x1 ? > 0 : -EIO; > } > > -int smu_v11_0_send_msg(struct smu_context *smu, uint16_t msg) > -{ > - struct amdgpu_device *adev = smu->adev; > - int ret = 0, index = 0; > - > - index = smu_msg_get_index(smu, msg); > - if (index < 0) > - return index; > - > - smu_v11_0_wait_for_response(smu); > - > - WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); > - > - smu_v11_0_send_msg_without_waiting(smu, (uint16_t)index); > - > - ret = smu_v11_0_wait_for_response(smu); > - > - if (ret) > - pr_err("failed send message: %10s (%d) response %#x\n", > - smu_get_message_name(smu, msg), index, ret); > - > - return ret; > - > -} > - > int > smu_v11_0_send_msg_with_param(struct smu_context *smu, uint16_t msg, > uint32_t param) > { > - > struct amdgpu_device *adev = smu->adev; > int ret = 0, index = 0; > > diff --git a/drivers/gpu/drm/amd/powerplay/smu_v12_0.c > b/drivers/gpu/drm/amd/powerplay/smu_v12_0.c > index 0451673..143650c 100644 > --- a/drivers/gpu/drm/amd/powerplay/smu_v12_0.c > +++ b/drivers/gpu/drm/amd/powerplay/smu_v12_0.c > @@ -77,31 +77,6 @@ int smu_v12_0_wait_for_response(struct smu_context > *smu) > return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90) == 0x1 ? > 0 : -EIO; > } > > -int smu_v12_0_send_msg(struct smu_context *smu, uint16_t msg) > -{ > - struct amdgpu_device *adev = smu->adev; > - int ret = 0, index = 0; > - > - index = smu_msg_get_index(smu, msg); > - if (index < 0) > - return index; > - > - smu_v12_0_wait_for_response(smu); > - > - WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); > - > - smu_v12_0_send_msg_without_waiting(smu, (uint16_t)index); > - > - ret = smu_v12_0_wait_for_response(smu); > - > - if (ret) > - pr_err("Failed to send message 0x%x, response 0x%x\n", index, > - ret); > - > - return ret; > - > -} > - > int > smu_v12_0_send_msg_with_param(struct smu_context *smu, uint16_t msg, > uint32_t param) > diff --git a/drivers/gpu/drm/amd/powerplay/vega20_ppt.c > b/drivers/gpu/drm/amd/powerplay/vega20_ppt.c > index 02ede5c..12bcc3e 100644 > --- a/drivers/gpu/drm/amd/powerplay/vega20_ppt.c > +++ b/drivers/gpu/drm/amd/powerplay/vega20_ppt.c > @@ -3231,7 +3231,6 @@ static const struct pptable_funcs vega20_ppt_funcs = > { > .set_tool_table_location = smu_v11_0_set_tool_table_location, > .notify_memory_pool_location = > smu_v11_0_notify_memory_pool_location, > .system_features_control = smu_v11_0_system_features_control, > - .send_smc_msg = smu_v11_0_send_msg, > .send_smc_msg_with_param = smu_v11_0_send_msg_with_param, > .read_smc_arg = smu_v11_0_read_arg, > .init_display_count = smu_v11_0_init_display_count, > -- > 2.7.4 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@xxxxxxxxxxxxxxxxxxxxx > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.free > desktop.org%2Fmailman%2Flistinfo%2Famd- > gfx&data=02%7C01%7Cevan.quan%40amd.com%7C0191e28c33a845754d > 3e08d7770eff27%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C6371 > 08779143176799&sdata=yElSgkvjUyJVBRqBs07FFkGWDiTceWHLgm%2B0I > kw23w4%3D&reserved=0 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx