On 2019-11-14 10:34 p.m., Aaron Liu wrote:
> From: Huang Rui <ray.huang@xxxxxxx>
>
> This patch is to add add device handle as input param for exec_cs_helper
> and write_linear_helper.
>
> Because they are needed in security tests.
>
> v2: fix typo that basic tests should be un-secure.
> v3: refine the function implementation.
> v4: remove amdgpu_cs_ctx_create3 calling.
>
> Signed-off-by: Huang Rui <ray.huang@xxxxxxx>
> Signed-off-by: Aaron Liu <aaron.liu@xxxxxxx>
> Reviewed-by: Alex Deucher <alexander.deucher@xxxxxxx>
> ---
> tests/amdgpu/amdgpu_test.h | 4 +++-
> tests/amdgpu/basic_tests.c | 52 +++++++++++++++++++++++++++++++---------------
> 2 files changed, 38 insertions(+), 18 deletions(-)
>
> diff --git a/tests/amdgpu/amdgpu_test.h b/tests/amdgpu/amdgpu_test.h
> index 67be437..16c2da0 100644
> --- a/tests/amdgpu/amdgpu_test.h
> +++ b/tests/amdgpu/amdgpu_test.h
> @@ -263,7 +263,9 @@ CU_BOOL suite_security_tests_enable(void);
> extern CU_TestInfo security_tests[];
>
> extern void
> -amdgpu_command_submission_write_linear_helper_with_secure(unsigned ip_type,
> +amdgpu_command_submission_write_linear_helper_with_secure(amdgpu_device_handle
> + device,
> + unsigned ip_type,
> bool secure);
>
Wasn't this already done in patch 5?
If yes, then it shouldn't be done here and only a single header file
should contain the truth.
If no, then why are two header files declaring this extern?
Should be only one.
Regards,
Luben
> /**
> diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c
> index 31c9a54..5154812 100644
> --- a/tests/amdgpu/basic_tests.c
> +++ b/tests/amdgpu/basic_tests.c
> @@ -1283,12 +1283,14 @@ static void amdgpu_command_submission_compute(void)
> * pm4_src, resources, ib_info, and ibs_request
> * submit command stream described in ibs_request and wait for this IB accomplished
> */
> -static void amdgpu_test_exec_cs_helper(amdgpu_context_handle context_handle,
> - unsigned ip_type,
> - int instance, int pm4_dw, uint32_t *pm4_src,
> - int res_cnt, amdgpu_bo_handle *resources,
> - struct amdgpu_cs_ib_info *ib_info,
> - struct amdgpu_cs_request *ibs_request)
> +static void
> +amdgpu_test_exec_cs_helper_raw(amdgpu_device_handle device_handle,
> + amdgpu_context_handle context_handle,
> + unsigned ip_type, int instance, int pm4_dw,
> + uint32_t *pm4_src, int res_cnt,
> + amdgpu_bo_handle *resources,
> + struct amdgpu_cs_ib_info *ib_info,
> + struct amdgpu_cs_request *ibs_request)
> {
> int r;
> uint32_t expired;
> @@ -1361,8 +1363,24 @@ static void amdgpu_test_exec_cs_helper(amdgpu_context_handle context_handle,
> CU_ASSERT_EQUAL(r, 0);
> }
>
> -void amdgpu_command_submission_write_linear_helper_with_secure(unsigned ip_type,
> - bool secure)
> +static void
> +amdgpu_test_exec_cs_helper(amdgpu_context_handle context_handle,
> + unsigned ip_type, int instance, int pm4_dw,
> + uint32_t *pm4_src, int res_cnt,
> + amdgpu_bo_handle *resources,
> + struct amdgpu_cs_ib_info *ib_info,
> + struct amdgpu_cs_request *ibs_request)
> +{
> + amdgpu_test_exec_cs_helper_raw(device_handle, context_handle,
> + ip_type, instance, pm4_dw, pm4_src,
> + res_cnt, resources, ib_info,
> + ibs_request);
> +}
> +
> +void
> +amdgpu_command_submission_write_linear_helper_with_secure(amdgpu_device_handle
> + device, unsigned
> + ip_type, bool secure)
> {
> const int sdma_write_length = 128;
> const int pm4_dw = 256;
> @@ -1388,13 +1406,13 @@ void amdgpu_command_submission_write_linear_helper_with_secure(unsigned ip_type,
> ibs_request = calloc(1, sizeof(*ibs_request));
> CU_ASSERT_NOT_EQUAL(ibs_request, NULL);
>
> - r = amdgpu_query_hw_ip_info(device_handle, ip_type, 0, &hw_ip_info);
> + r = amdgpu_query_hw_ip_info(device, ip_type, 0, &hw_ip_info);
> CU_ASSERT_EQUAL(r, 0);
>
> for (i = 0; secure && (i < 2); i++)
> gtt_flags[i] |= AMDGPU_GEM_CREATE_ENCRYPTED;
>
> - r = amdgpu_cs_ctx_create(device_handle, &context_handle);
> + r = amdgpu_cs_ctx_create(device, &context_handle);
>
> CU_ASSERT_EQUAL(r, 0);
>
> @@ -1406,7 +1424,7 @@ void amdgpu_command_submission_write_linear_helper_with_secure(unsigned ip_type,
> loop = 0;
> while(loop < 2) {
> /* allocate UC bo for sDMA use */
> - r = amdgpu_bo_alloc_and_map(device_handle,
> + r = amdgpu_bo_alloc_and_map(device,
> sdma_write_length * sizeof(uint32_t),
> 4096, AMDGPU_GEM_DOMAIN_GTT,
> gtt_flags[loop], &bo, (void**)&bo_cpu,
> @@ -1445,11 +1463,10 @@ void amdgpu_command_submission_write_linear_helper_with_secure(unsigned ip_type,
> pm4[i++] = 0xdeadbeaf;
> }
>
> - amdgpu_test_exec_cs_helper(context_handle,
> - ip_type, ring_id,
> - i, pm4,
> - 1, resources,
> - ib_info, ibs_request);
> + amdgpu_test_exec_cs_helper_raw(device, context_handle,
> + ip_type, ring_id, i, pm4,
> + 1, resources, ib_info,
> + ibs_request);
>
> /* verify if SDMA test result meets with expected */
> i = 0;
> @@ -1476,7 +1493,8 @@ void amdgpu_command_submission_write_linear_helper_with_secure(unsigned ip_type,
>
> static void amdgpu_command_submission_write_linear_helper(unsigned ip_type)
> {
> - amdgpu_command_submission_write_linear_helper_with_secure(ip_type,
> + amdgpu_command_submission_write_linear_helper_with_secure(device_handle,
> + ip_type,
> false);
> }
>
>
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