Reviewed-by: Evan Quan <evan.quan@xxxxxxx>
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Matt
> Coffin
> Sent: Friday, November 8, 2019 2:36 AM
> To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Matt Coffin <mcoffin13@xxxxxxxxx>
> Subject: [PATCH 3/3] drm/amdgpu/navi10: Implement od clk printing
>
> [Why]
> Before this patch, navi10 overdrive settings could not be printed via
> pp_od_clk_voltage
>
> [How]
> Implement printing for the overdrive settings for the following clocks in
> navi10's ppt print_clk_levels implementation:
>
> * SMU_OD_SCLK
> * SMU_OD_MCLK
> * SMU_OD_VDDC_CURVE
> ---
> drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 56 ++++++++++++++++++++--
> 1 file changed, 51 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
> b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
> index e717328f93ce..506af59ff45f 100644
> --- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
> +++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
> @@ -677,13 +677,25 @@ static bool
> navi10_is_support_fine_grained_dpm(struct smu_context *smu, enum smu
> return dpm_desc->SnapToDiscrete == 0 ? true : false; }
>
> +static inline bool navi10_od_feature_is_supported(struct
> +smu_11_0_overdrive_table *od_table, enum SMU_11_0_ODFEATURE_ID
> feature) {
> + return od_table->cap[feature];
> +}
> +
> +
> static int navi10_print_clk_levels(struct smu_context *smu,
> enum smu_clk_type clk_type, char *buf) {
> + OverDriveTable_t *od_table;
> + struct smu_11_0_overdrive_table *od_settings;
> + uint16_t *curve_settings;
> int i, size = 0, ret = 0;
> uint32_t cur_value = 0, value = 0, count = 0;
> uint32_t freq_values[3] = {0};
> uint32_t mark_index = 0;
> + struct smu_table_context *table_context = &smu->smu_table;
> + od_table = (OverDriveTable_t *)table_context->overdrive_table;
> + od_settings = smu->od_settings;
>
> switch (clk_type) {
> case SMU_GFXCLK:
> @@ -734,6 +746,45 @@ static int navi10_print_clk_levels(struct smu_context
> *smu,
>
> }
> break;
> + case SMU_OD_SCLK:
> + if (!smu->od_enabled || !od_table || !od_settings)
> + break;
> + if (!navi10_od_feature_is_supported(od_settings,
> SMU_11_0_ODFEATURE_GFXCLK_LIMITS))
> + break;
> + size += sprintf(buf + size, "OD_SCLK:\n");
> + size += sprintf(buf + size, "0: %uMhz\n1: %uMhz\n", od_table-
> >GfxclkFmin, od_table->GfxclkFmax);
> + break;
> + case SMU_OD_MCLK:
> + if (!smu->od_enabled || !od_table || !od_settings)
> + break;
> + if (!navi10_od_feature_is_supported(od_settings,
> SMU_11_0_ODFEATURE_UCLK_MAX))
> + break;
> + size += sprintf(buf + size, "OD_MCLK:\n");
> + size += sprintf(buf + size, "0: %uMHz\n", od_table->UclkFmax);
> + break;
> + case SMU_OD_VDDC_CURVE:
> + if (!smu->od_enabled || !od_table || !od_settings)
> + break;
> + if (!navi10_od_feature_is_supported(od_settings,
> SMU_11_0_ODFEATURE_GFXCLK_CURVE))
> + break;
> + size += sprintf(buf + size, "OD_VDDC_CURVE:\n");
> + for (i = 0; i < 3; i++) {
> + switch (i) {
> + case 0:
> + curve_settings = &od_table->GfxclkFreq1;
> + break;
> + case 1:
> + curve_settings = &od_table->GfxclkFreq2;
> + break;
> + case 2:
> + curve_settings = &od_table->GfxclkFreq3;
> + break;
> + default:
> + break;
> + }
> + size += sprintf(buf + size, "%d: %uMHz @ %umV\n", i,
> curve_settings[0], curve_settings[1] / NAVI10_VOLTAGE_SCALE);
> + }
> + break;
> default:
> break;
> }
> @@ -1600,11 +1651,6 @@ static inline void
> navi10_dump_od_table(OverDriveTable_t *od_table) {
> pr_debug("OD: OverDrivePct: %d\n", od_table->OverDrivePct); }
>
> -static inline bool navi10_od_feature_is_supported(struct
> smu_11_0_overdrive_table *od_table, enum SMU_11_0_ODFEATURE_ID
> feature) -{
> - return od_table->cap[feature];
> -}
> -
> static int navi10_od_setting_check_range(struct smu_11_0_overdrive_table
> *od_table, enum SMU_11_0_ODSETTING_ID setting, uint32_t value) {
> if (value < od_table->min[setting]) {
> --
> 2.23.0
>
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