On Tue, Nov 5, 2019 at 4:34 AM Quan, Evan <Evan.Quan@xxxxxxx> wrote:
>
> Enable pcie_replay_count interface support on Navi.
>
> Change-Id: Idc770663416ecf45aab8caa19de9cc99b619d2c3
> Signed-off-by: Evan Quan <evan.quan@xxxxxxx>
Acked-by: Alex Deucher <alexander.deucher@xxxxxxx>
> ---
> drivers/gpu/drm/amd/amdgpu/nv.c | 14 ++++++++++
> .../amd/include/asic_reg/nbio/nbio_2_3_smn.h | 28 +++++++++++++++++++
> 2 files changed, 42 insertions(+)
> create mode 100644 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_smn.h
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
> index 88e3665f7b09..c87e01a736f2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/nv.c
> +++ b/drivers/gpu/drm/amd/amdgpu/nv.c
> @@ -39,6 +39,7 @@
> #include "gc/gc_10_1_0_sh_mask.h"
> #include "hdp/hdp_5_0_0_offset.h"
> #include "hdp/hdp_5_0_0_sh_mask.h"
> +#include "nbio/nbio_2_3_smn.h"
>
> #include "soc15.h"
> #include "soc15_common.h"
> @@ -567,6 +568,18 @@ static void nv_init_doorbell_index(struct amdgpu_device *adev)
> adev->doorbell_index.sdma_doorbell_range = 20;
> }
>
> +static uint64_t nv_get_pcie_replay_count(struct amdgpu_device *adev)
> +{
> + uint64_t nak_r, nak_g;
> +
> + /* Get the number of NAKs received and generated */
> + nak_r = RREG32_PCIE(smnPCIE_RX_NUM_NAK);
> + nak_g = RREG32_PCIE(smnPCIE_RX_NUM_NAK_GENERATED);
> +
> + /* Add the total number of NAKs, i.e the number of replays */
> + return (nak_r + nak_g);
> +}
> +
> static const struct amdgpu_asic_funcs nv_asic_funcs =
> {
> .read_disabled_bios = &nv_read_disabled_bios,
> @@ -585,6 +598,7 @@ static const struct amdgpu_asic_funcs nv_asic_funcs =
> .need_full_reset = &nv_need_full_reset,
> .get_pcie_usage = &nv_get_pcie_usage,
> .need_reset_on_init = &nv_need_reset_on_init,
> + .get_pcie_replay_count = &nv_get_pcie_replay_count,
> };
>
> static int nv_common_early_init(void *handle)
> diff --git a/drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_smn.h b/drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_smn.h
> new file mode 100644
> index 000000000000..a40ba98cc8bb
> --- /dev/null
> +++ b/drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_smn.h
> @@ -0,0 +1,28 @@
> +/*
> + * Copyright (C) 2019 Advanced Micro Devices, Inc.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included
> + * in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
> + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> + * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
> + * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
> + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#ifndef _nbio_2_3_SMN_HEADER
> +#define _nbio_2_3_SMN_HEADER
> +
> +#define smnPCIE_RX_NUM_NAK 0x11180038
> +#define smnPCIE_RX_NUM_NAK_GENERATED 0x1118003c
> +
> +#endif // _nbio_2_3_SMN_HEADER
> --
> 2.23.0
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@xxxxxxxxxxxxxxxxxxxxx
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
