Series are Reviewed-by: Huang Rui <ray.huang@xxxxxxx>
-----Original Message-----
From: Liang, Prike <Prike.Liang@xxxxxxx>
Sent: Tuesday, October 15, 2019 5:50 PM
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Quan, Evan <Evan.Quan@xxxxxxx>; Feng, Kenneth <Kenneth.Feng@xxxxxxx>; Huang, Ray <Ray.Huang@xxxxxxx>; Liang, Prike <Prike.Liang@xxxxxxx>
Subject: [PATCH 1/2] drm/amdgpu: add GFX_PIPELINE capacity check for updating gfx cgpg
Before disable gfx pipeline power gating need check the flag AMD_PG_SUPPORT_GFX_PIPELINE.
Signed-off-by: Prike Liang <Prike.Liang@xxxxxxx>
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index b577b69..de8f9d6 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -4296,7 +4296,8 @@ static void gfx_v9_0_update_gfx_cg_power_gating(struct amdgpu_device *adev,
gfx_v9_0_enable_gfx_pipeline_powergating(adev, true);
} else {
gfx_v9_0_enable_gfx_cg_power_gating(adev, false);
- gfx_v9_0_enable_gfx_pipeline_powergating(adev, false);
+ if (adev->pg_flags & AMD_PG_SUPPORT_GFX_PIPELINE)
+ gfx_v9_0_enable_gfx_pipeline_powergating(adev, false);
}
amdgpu_gfx_rlc_exit_safe_mode(adev);
--
2.7.4
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